Abstract
To overcome the limitations of chemical doping in nanometer-scale semiconductor devices, electrostatic doping (ED) is emerging as a broadly investigated alternative to provide regions with a high electron or hole density in a semiconductor device. In this paper, we review various reported ED approaches and related device architectures in different material systems. We highlight the role of metal and semiconductor workfunctions, energy bandgap, and applied electric field and the interplay between them for the induced ED. The effect of interface traps on the induced charge is also addressed. In addition, we discuss the performance benefits of ED devices and the major roadblocks of these approaches for potential future CMOS technology.
| Original language | English |
|---|---|
| Pages (from-to) | 3044-3055 |
| Number of pages | 12 |
| Journal | IEEE Transactions on Electron Devices |
| Volume | 64 |
| Issue number | 8 |
| Early online date | 23 Jun 2017 |
| DOIs | |
| Publication status | Published - Aug 2017 |
Keywords
- Doping
- Logic gates
- Metals
- Schottky barriers
- Silicon
- Electrostatics
- Charge carrier processes
- 2023 OA procedure
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