Abstract
Image processing is one of the popular applications of Cellular Neural Networks. Macro enriched field-programmable gate-arrays can be used to realize such systems on silicon. The paper discusses a pipelined implementation that supports the handling of gray-level images at 180 to 240 Mpixels per second by exploiting the Virtex-II macros to spatially unroll the local feedback.
Original language | English |
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Title of host publication | Proceedings of the 4th PROGRESS Symposium on Embedded Systems |
Place of Publication | Nieuwegein, The Netherlands |
Publisher | STW |
Pages | 232-237 |
Number of pages | 6 |
ISBN (Print) | 90-73461-37-5 |
Publication status | Published - 22 Oct 2003 |
Event | 4th PROGRESS Symposium on Embedded Systems 2003 - Nieuwegein, Netherlands Duration: 22 Oct 2003 → 22 Oct 2003 Conference number: 4 |
Conference
Conference | 4th PROGRESS Symposium on Embedded Systems 2003 |
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Abbreviated title | PROGRESS |
Country/Territory | Netherlands |
City | Nieuwegein |
Period | 22/10/03 → 22/10/03 |