Primary requirements of wireless multimedia handheld computers are high-performance, flexibility, energy-efficiency and low costs. A compromise for these contradicting requirements can be found in a heterogeneous SoC. Besides conventional architectures such a SoC contains domain specific coarse grain reconfigurable processors and fine-grain reconfigurable entities. The MONTIUM is a prototype of a novel coarsegrain reconfigurable processor. The SoC template offers a balance between flexibility, efficiency and performance. In this paper the energy and performance characteristics of the MONTIUM are compared with the characteristics of other state-of-the-art (reconfigurable) architectures.
|Title of host publication||Proceedings of the International Conference on Engineering of Reconfigurable Systems and Algorithms (ERSA'04)|
|Place of Publication||Las Vegas, USA|
|Number of pages||7|
|Publication status||Published - Jun 2004|
|Event||2004 International Conference on Engineering of Reconfigurable Systems & Algorithms, ERSA '04 - Las Vegas, United States|
Duration: 21 Jun 2004 → 24 Jun 2004
|Conference||2004 International Conference on Engineering of Reconfigurable Systems & Algorithms, ERSA '04|
|Period||21/06/04 → 24/06/04|
- CAES-EEA: Efficient Embedded Architectures
Heysters, P. M., Smit, G. J. M., & Molenkamp, E. (2004). Energy-Efficiency of the Montium Reconfigurable Tile Processor. In Proceedings of the International Conference on Engineering of Reconfigurable Systems and Algorithms (ERSA'04) (pp. 38-44). Las Vegas, USA: CSREA Press.