Enhancing Physical Unclonable Function Robustness Employing Embedded Instruments

Jerrin Pathrose Vareed, Ghazanfar Ali, Hans G. Kerkhoff

    Research output: Chapter in Book/Report/Conference proceedingConference contributionAcademicpeer-review

    Abstract

    This paper proposes a methodology to improve the robustness of CMOS physical unclonable functions with regard to environmental parameter variations and thus enhancing the security. The methodology exploits the reuse of embedded instruments which are being deployed for dependability purposes. The approach is hardware and power efficient which is especially important for applications such as IoT. Chip implementation of the embedded instruments in 40nm CMOS technology is presented in addition to simulations and experimental validation on an FPGA.
    Original languageEnglish
    Title of host publication 2018 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS)
    PublisherIEEE
    Pages370-373
    Number of pages4
    ISBN (Electronic)978-1-5386-8240-1
    ISBN (Print)978-1-5386-8241-8
    DOIs
    Publication statusPublished - 10 Jan 2019
    Event2018 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2018 - Shangri-La Hotel, Chengdu, China
    Duration: 26 Oct 201830 Oct 2018
    Conference number: 14
    http://apccas.com/

    Conference

    Conference2018 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2018
    Abbreviated titleAPCCAS
    CountryChina
    CityChengdu
    Period26/10/1830/10/18
    Internet address

    Keywords

    • Embedded Instruments
    • Physical unclonable function
    • Reliability
    • Temperature
    • IJTAG

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  • Cite this

    Pathrose Vareed, J., Ali, G., & Kerkhoff, H. G. (2019). Enhancing Physical Unclonable Function Robustness Employing Embedded Instruments. In 2018 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS) (pp. 370-373). [8605571] IEEE. https://doi.org/10.1109/APCCAS.2018.8605571