Enhancing Physical Unclonable Function Robustness Employing Embedded Instruments

Research output: Chapter in Book/Report/Conference proceedingConference contributionAcademicpeer-review

Abstract

This paper proposes a methodology to improve the robustness of CMOS physical unclonable functions with regard to environmental parameter variations and thus enhancing the security. The methodology exploits the reuse of embedded instruments which are being deployed for dependability purposes. The approach is hardware and power efficient which is especially important for applications such as IoT. Chip implementation of the embedded instruments in 40nm CMOS technology is presented in addition to simulations and experimental validation on an FPGA.
Original languageEnglish
Title of host publication 2018 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS)
PublisherIEEE
Pages370-373
Number of pages4
ISBN (Electronic)978-1-5386-8240-1
ISBN (Print)978-1-5386-8241-8
DOIs
Publication statusPublished - 10 Jan 2019
Event2018 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2018 - Shangri-La Hotel, Chengdu, China
Duration: 26 Oct 201830 Oct 2018
Conference number: 14
http://apccas.com/

Conference

Conference2018 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2018
Abbreviated titleAPCCAS
CountryChina
CityChengdu
Period26/10/1830/10/18
Internet address

Fingerprint

Field programmable gate arrays (FPGA)
Hardware
Hardware security
Internet of things

Keywords

  • Embedded Instruments
  • Physical unclonable function
  • Reliability
  • Temperature
  • IJTAG

Cite this

Pathrose Vareed, Jerrin ; Ali, Ghazanfar ; Kerkhoff, Hans G. / Enhancing Physical Unclonable Function Robustness Employing Embedded Instruments. 2018 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS). IEEE, 2019. pp. 370-373
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title = "Enhancing Physical Unclonable Function Robustness Employing Embedded Instruments",
abstract = "This paper proposes a methodology to improve the robustness of CMOS physical unclonable functions with regard to environmental parameter variations and thus enhancing the security. The methodology exploits the reuse of embedded instruments which are being deployed for dependability purposes. The approach is hardware and power efficient which is especially important for applications such as IoT. Chip implementation of the embedded instruments in 40nm CMOS technology is presented in addition to simulations and experimental validation on an FPGA.",
keywords = "Embedded Instruments, Physical unclonable function, Reliability, Temperature, IJTAG",
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Pathrose Vareed, J, Ali, G & Kerkhoff, HG 2019, Enhancing Physical Unclonable Function Robustness Employing Embedded Instruments. in 2018 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS)., 8605571, IEEE, pp. 370-373, 2018 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2018, Chengdu, China, 26/10/18. https://doi.org/10.1109/APCCAS.2018.8605571

Enhancing Physical Unclonable Function Robustness Employing Embedded Instruments. / Pathrose Vareed, Jerrin ; Ali, Ghazanfar ; Kerkhoff, Hans G.

2018 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS). IEEE, 2019. p. 370-373 8605571.

Research output: Chapter in Book/Report/Conference proceedingConference contributionAcademicpeer-review

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N2 - This paper proposes a methodology to improve the robustness of CMOS physical unclonable functions with regard to environmental parameter variations and thus enhancing the security. The methodology exploits the reuse of embedded instruments which are being deployed for dependability purposes. The approach is hardware and power efficient which is especially important for applications such as IoT. Chip implementation of the embedded instruments in 40nm CMOS technology is presented in addition to simulations and experimental validation on an FPGA.

AB - This paper proposes a methodology to improve the robustness of CMOS physical unclonable functions with regard to environmental parameter variations and thus enhancing the security. The methodology exploits the reuse of embedded instruments which are being deployed for dependability purposes. The approach is hardware and power efficient which is especially important for applications such as IoT. Chip implementation of the embedded instruments in 40nm CMOS technology is presented in addition to simulations and experimental validation on an FPGA.

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Pathrose Vareed J, Ali G, Kerkhoff HG. Enhancing Physical Unclonable Function Robustness Employing Embedded Instruments. In 2018 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS). IEEE. 2019. p. 370-373. 8605571 https://doi.org/10.1109/APCCAS.2018.8605571