Epitaxy and device behaviour of collector-up SiGe HBTs with a partial p-type collector

A detailed experimental study has been made of the issues related to base dopant activation and mesa isolation in collector-up SiGe HBTs. It is concluded that to avoid excessive emitter-base diode leakage: (i) the metallurgic emitter-base junction should be moved away from the trenched p⁺ base doping peak, and (ii) the base contact implant should not be placed in the high n-doped emitter substrate. Both recommendations can be followed by applying an implanted pedestal emitter. To furthermore avoid TED, the base contact implantation is activated by laser annealing. To achieve a good quality collector-base diode, a p^-nn⁺ collector profile is introduced. As a result, the transistor profile is a stack of several doped Si and SiGe layers. This stack is grown by AP/LPCVD dichlorosilane based epitaxy, which was optimised to suppress autodoping and to achieve sharp transitions. Hence the 1150°C prebake was performed at low pressure and high flow, and followed by a 10 nm undoped Si deposition at 700°C. Moreover, 5 nm undoped Si layers were inserted for dopant decoupling. The effect of the p^- layer in the collector on the device behaviour was analysed by device simulations. It was found that this p^- layer does not significantly affect the DC and high-frequency performance of the device.