The real-time system research community has paid a lot of attention to the design of safety critical hard real-time systems for which the use of non-standard hardware and operating systems can be justied. However, stream processing applications like medical imaging systems are often not considered safety critical enough to justify the use of hard real-time techniques that would increase the cost of these systems signicantly. Instead commercial off the shelf (COTS) hardware and OS are used, and techniques at the application level are employed to reduce the variation in the end-to-end latency of these imaging processing systems. In this paper, we study the effectiveness of a number of scheduling heuristics that are intended to reduce the latency and the jitter of stream processing applications that are executed on COTS multiprocessor systems. The proposed scheduling heuristics take the execution times of tasks into account as well as dependencies between the tasks, the data structures accessed by the tasks, and the memory hierarchy. Experiments were carried out on a quad core symmetric multiprocessing (SMP) Intel processor. These experiments show that the proposed heuristics can reduce the end-to-end latency with almost 60%, and reduce the variation in the latency with more than 90% when compared with a naive scheduling heuristic that does not consider execution times, dependencies and the memory hierarchy.
|Number of pages||7|
|Publication status||Published - 2011|
|Event||9th IEEE Symposium on Embedded Systems for Real-Time Multimedia, ESTIMedia 2011 - Taipei, Taiwan|
Duration: 13 Oct 2011 → 14 Oct 2011
Conference number: 9
|Conference||9th IEEE Symposium on Embedded Systems for Real-Time Multimedia, ESTIMedia 2011|
|Period||13/10/11 → 14/10/11|