Experience with a clustered parallel reduction machine

M. Beemster; P.H. Hartel; L.O. Hertzberger; R.F.H. Hofman; K.G. Langendoen; L.L. Li; R. Milikowski; W.G. Vree; H.P. Barendregt; J.C. Mulder

doi:10.1016/0167-739X(93)90011-D

Experience with a clustered parallel reduction machine

M. Beemster, P.H. Hartel, L.O. Hertzberger, R.F.H. Hofman, K.G. Langendoen, L.L. Li, R. Milikowski, W.G. Vree, H.P. Barendregt, J.C. Mulder

Research output: Contribution to journal › Article › Academic › peer-review

77 Downloads (Pure)

Abstract

A clustered architecture has been designed to exploit divide and conquer parallelism in functional programs. The programming methodology developed for the machine is based on explicit annotations and program transformations. It has been successfully applied to a number of algorithms resulting in a benchmark of small andmediumsize parallel functional programs. Sophisticated compilation techniques are used such as strictness analysis on non-flat domains and RISC and VLIW code generation. Parallel jobs are distributed by an efficient hierarchical scheduler. A special processor for graph reduction has been designed as a basic building block for the machine. A prototype of a single cluster machine has been constructed with stock hardware. This paper describes the experience with the project and its current state.

Original language	English
Pages (from-to)	175-200
Number of pages	26
Journal	Future generation computer systems
Volume	9
Issue number	3
DOIs	https://doi.org/10.1016/0167-739X(93)90011-D
Publication status	Published - Sept 1993

Access to Document

10.1016/0167-739X(93)90011-D

FGCS_experience

Cite this

@article{c2b6e6290772492f8b8416d16c657c7e,

title = "Experience with a clustered parallel reduction machine",

abstract = "A clustered architecture has been designed to exploit divide and conquer parallelism in functional programs. The programming methodology developed for the machine is based on explicit annotations and program transformations. It has been successfully applied to a number of algorithms resulting in a benchmark of small andmediumsize parallel functional programs. Sophisticated compilation techniques are used such as strictness analysis on non-flat domains and RISC and VLIW code generation. Parallel jobs are distributed by an efficient hierarchical scheduler. A special processor for graph reduction has been designed as a basic building block for the machine. A prototype of a single cluster machine has been constructed with stock hardware. This paper describes the experience with the project and its current state.",

author = "M. Beemster and P.H. Hartel and L.O. Hertzberger and R.F.H. Hofman and K.G. Langendoen and L.L. Li and R. Milikowski and W.G. Vree and H.P. Barendregt and J.C. Mulder",

note = "Imported from DIES",

year = "1993",

month = sep,

doi = "10.1016/0167-739X(93)90011-D",

language = "English",

volume = "9",

pages = "175--200",

journal = "Future generation computer systems",

issn = "0167-739X",

publisher = "Elsevier B.V.",

number = "3",

}

TY - JOUR

T1 - Experience with a clustered parallel reduction machine

AU - Beemster, M.

AU - Hartel, P.H.

AU - Hertzberger, L.O.

AU - Hofman, R.F.H.

AU - Langendoen, K.G.

AU - Li, L.L.

AU - Milikowski, R.

AU - Vree, W.G.

AU - Barendregt, H.P.

AU - Mulder, J.C.

N1 - Imported from DIES

PY - 1993/9

Y1 - 1993/9

N2 - A clustered architecture has been designed to exploit divide and conquer parallelism in functional programs. The programming methodology developed for the machine is based on explicit annotations and program transformations. It has been successfully applied to a number of algorithms resulting in a benchmark of small andmediumsize parallel functional programs. Sophisticated compilation techniques are used such as strictness analysis on non-flat domains and RISC and VLIW code generation. Parallel jobs are distributed by an efficient hierarchical scheduler. A special processor for graph reduction has been designed as a basic building block for the machine. A prototype of a single cluster machine has been constructed with stock hardware. This paper describes the experience with the project and its current state.

AB - A clustered architecture has been designed to exploit divide and conquer parallelism in functional programs. The programming methodology developed for the machine is based on explicit annotations and program transformations. It has been successfully applied to a number of algorithms resulting in a benchmark of small andmediumsize parallel functional programs. Sophisticated compilation techniques are used such as strictness analysis on non-flat domains and RISC and VLIW code generation. Parallel jobs are distributed by an efficient hierarchical scheduler. A special processor for graph reduction has been designed as a basic building block for the machine. A prototype of a single cluster machine has been constructed with stock hardware. This paper describes the experience with the project and its current state.

U2 - 10.1016/0167-739X(93)90011-D

DO - 10.1016/0167-739X(93)90011-D

M3 - Article

SN - 0167-739X

VL - 9

SP - 175

EP - 200

JO - Future generation computer systems

JF - Future generation computer systems

IS - 3

ER -

Experience with a clustered parallel reduction machine

Abstract

Access to Document

Fingerprint

Cite this