Fabrication of large-volume rectangular channels using trench-sidewall technology and a SOI substrate

Henk-Willem  Veltkamp; Yiyuan  Zhao; Meint J. de Boer; Jarno Groenesteijn; Remco J. Wiegerink; Joost Conrad Lötters

Fabrication of large-volume rectangular channels using trench-sidewall technology and a SOI substrate

Henk-Willem Veltkamp, Yiyuan Zhao, Meint J. de Boer, Jarno Groenesteijn, Remco J. Wiegerink, Joost Conrad Lötters

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Academic

200 Downloads (Pure)

Abstract

In this paper we propose an extension of surface channel technology (SCT) which is based on trench side wall technologies from the micro-electronics industry and silicon-on-insulator (SOI) wafers. In this CMOS compatible trench-assisted surface channel technology (TASCT) process, refilled trenches define the outline
of the microfluidic channels and chambers in the lateral plane and serve as etch stops during channel etching. This ensures well-defined channel shapes and the possibility to incorporate in-channel pillar structures in order to fabricate large-volume rectangular microfluidic channels, which can be integrated with smaller cross-sectional channels. When a highly-doped device layer is chosen, the possibility arises to add side wall heater structures next to the microfluidic channels as well.

Original language	English
Title of host publication	The 3rd Conference on MicroFluidic Handling Systems
Subtitle of host publication	Conference Proceedings
Editors	Dennis Alveringh
Place of Publication	Enschede
Publisher	University of Twente
Pages	114-117
Publication status	Published - 14 Oct 2017

Access to Document

Veltkamp2017fabricationFinal published version, 298 KB

Cite this

@inproceedings{5be860da47ca480690127dc917927af9,

title = "Fabrication of large-volume rectangular channels using trench-sidewall technology and a SOI substrate",

abstract = "In this paper we propose an extension of surface channel technology (SCT) which is based on trench side wall technologies from the micro-electronics industry and silicon-on-insulator (SOI) wafers. In this CMOS compatible trench-assisted surface channel technology (TASCT) process, refilled trenches define the outlineof the microfluidic channels and chambers in the lateral plane and serve as etch stops during channel etching. This ensures well-defined channel shapes and the possibility to incorporate in-channel pillar structures in order to fabricate large-volume rectangular microfluidic channels, which can be integrated with smaller cross-sectional channels. When a highly-doped device layer is chosen, the possibility arises to add side wall heater structures next to the microfluidic channels as well.",

author = "Henk-Willem Veltkamp and Yiyuan Zhao and {de Boer}, {Meint J.} and Jarno Groenesteijn and Wiegerink, {Remco J.} and L{\"o}tters, {Joost Conrad}",

year = "2017",

month = oct,

day = "14",

language = "English",

pages = "114--117",

editor = "Dennis Alveringh",

booktitle = "The 3rd Conference on MicroFluidic Handling Systems",

publisher = "University of Twente",

address = "Netherlands",

}

Fabrication of large-volume rectangular channels using trench-sidewall technology and a SOI substrate. / Veltkamp, Henk-Willem ; Zhao, Yiyuan ; de Boer, Meint J. et al.
The 3rd Conference on MicroFluidic Handling Systems: Conference Proceedings . ed. / Dennis Alveringh. Enschede: University of Twente, 2017. p. 114-117.

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Academic

TY - GEN

T1 - Fabrication of large-volume rectangular channels using trench-sidewall technology and a SOI substrate

AU - Veltkamp, Henk-Willem

AU - Zhao, Yiyuan

AU - de Boer, Meint J.

AU - Groenesteijn, Jarno

AU - Wiegerink, Remco J.

AU - Lötters, Joost Conrad

PY - 2017/10/14

Y1 - 2017/10/14

N2 - In this paper we propose an extension of surface channel technology (SCT) which is based on trench side wall technologies from the micro-electronics industry and silicon-on-insulator (SOI) wafers. In this CMOS compatible trench-assisted surface channel technology (TASCT) process, refilled trenches define the outlineof the microfluidic channels and chambers in the lateral plane and serve as etch stops during channel etching. This ensures well-defined channel shapes and the possibility to incorporate in-channel pillar structures in order to fabricate large-volume rectangular microfluidic channels, which can be integrated with smaller cross-sectional channels. When a highly-doped device layer is chosen, the possibility arises to add side wall heater structures next to the microfluidic channels as well.

AB - In this paper we propose an extension of surface channel technology (SCT) which is based on trench side wall technologies from the micro-electronics industry and silicon-on-insulator (SOI) wafers. In this CMOS compatible trench-assisted surface channel technology (TASCT) process, refilled trenches define the outlineof the microfluidic channels and chambers in the lateral plane and serve as etch stops during channel etching. This ensures well-defined channel shapes and the possibility to incorporate in-channel pillar structures in order to fabricate large-volume rectangular microfluidic channels, which can be integrated with smaller cross-sectional channels. When a highly-doped device layer is chosen, the possibility arises to add side wall heater structures next to the microfluidic channels as well.

UR - http://www.mfhs2017.org

M3 - Conference contribution

SP - 114

EP - 117

BT - The 3rd Conference on MicroFluidic Handling Systems

A2 - Alveringh, Dennis

PB - University of Twente

CY - Enschede

ER -

Fabrication of large-volume rectangular channels using trench-sidewall technology and a SOI substrate

Abstract

Access to Document

Other files and links

Fingerprint

Cite this