Fast thermal cycling stress and degredation in multilayer interconnects

Van Hieu Nguyen, Cora Salm, J. Vroemen, J. Voets, B. Krabbenborg, J. Bisschop, A.J. Mouthaan, F.G. Kuper

    Research output: Contribution to conferencePaper

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    Abstract

    The thermal cycling stress method is popularly used to study the thermal mechanical effect on metallization films in VLSI applications, specially in interconnect systems of power IC. The fast thermal cycling stress method reported in this paper has several advantages compared with using a conventional oven for thermal stress. A special test chip is designed to demonstrate the application of this method. A diode in the test chip plays a part as temperature sensor. The diode thermal coefficient is determined to be 1.8mV/OC. The first experiment of temperature cycling stress is done with temperature ranging to be from 46 to 286oC (T of 240oC). The failure analysis is done by SEM equipment with Backscatter Electron (BSE) detector. The results show the mechanism observed that the failure mechanism is quite similar with temperature cycling stress using a conventional oven.
    Original languageEnglish
    Pages136-140
    Number of pages5
    Publication statusPublished - 2001
    Event4th Annual Workshop on Semiconductor Advances for Future Electronics and Sensors, SAFE 2001 - Veldhoven, Netherlands
    Duration: 28 Nov 200130 Nov 2001

    Workshop

    Workshop4th Annual Workshop on Semiconductor Advances for Future Electronics and Sensors, SAFE 2001
    Country/TerritoryNetherlands
    CityVeldhoven
    Period28/11/0130/11/01

    Keywords

    • BSE
    • chip temperature measurement
    • Thermal cycling
    • multilayer interconnects
    • SEM

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