Fast turn-on of an NMOS ESD protection transistor: measurements and simulations

J.R.M. Luchies, J.R.M. Luchies, C.G.M. de Kort, J.F. Verweij, J.F. Verweij

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    Abstract

    The transient turn-on of the parasitic bipolar transistor of an NMOS transistor was studied. The voltages appearing at internal nodes of protection and functional circuit after application of 350 ps rise-time pulses have been measured using electro-optic sampling. For very fast transients the triggering of the protection transistor shifts from an avalanche multiplication current towards a displacement current-induced triggering, thereby lowering the trigger voltage. With our circuit simulation mode we are able to predict the outcome of human body model and charged device model testing.
    Original languageUndefined
    Pages (from-to)81-92
    JournalJournal of electrostatics
    Volume36
    Issue number1
    DOIs
    Publication statusPublished - 1995

    Keywords

    • METIS-112060
    • IR-15186

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