Floorplan Optimized Topological Partitioning of Programmed Logic Arrays

A.J.W.M. ten Berg

    Research output: Chapter in Book/Report/Conference proceedingConference contributionAcademicpeer-review

    Original languageUndefined
    Title of host publicationProceedings of the WG 10.5 IFIP Workshop on Synthesis, Generation and Portability of Library Blocks for ASIC Design
    Place of PublicationGrenoble
    Number of pages0
    Publication statusPublished - 13 Mar 1992


    • METIS-119224

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