FPGA acceleration of the phylogenetic parsimony kernel?

Nikolaos Alachiotis*, Alexandros Stamatakis

*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceedingConference contributionAcademicpeer-review

18 Citations (Scopus)

Abstract

The phylogenetic parsimony function is a popular, discrete criterion for reconstructing evolutionary trees based on molecular sequence data. Parsimony strives to find the phylogenetic tree that explains the evolutionary history of organisms by the least number of mutations. Because parsimony is a discrete function, it should fit well to FPGAs. We present a versatile FPGA implementation of the parsimony function and compare its performance to a highly optimized SSE3- and AVX-vectorized software implementation.We find that, because of a particular constellation in our lab, the speedups that can be achieved by using an FPGA, are substantially less impressive, than usually reported in papers on FPGA acceleration of bioinformatics kernels.We conclude that, a competitive spirit between SW and HW application developers can contribute toward obtaining more objective performance comparisons.

Original languageEnglish
Title of host publicationProceedings - 21st International Conference on Field Programmable Logic and Applications, FPL 2011
Place of PublicationPiscataway, NJ
PublisherIEEE
Pages417-422
Number of pages6
ISBN (Electronic)978-0-7695-4529-5
ISBN (Print)978-1-4577-1484-9
DOIs
Publication statusPublished - 13 Oct 2011
Externally publishedYes
Event21st International Conference on Field Programmable Logic and Applications, FPL 2011 - Chania, Greece
Duration: 5 Sept 20117 Sept 2011
Conference number: 21

Publication series

NameProceedings - International Conference on Field Programmable Logic and Applications (FPL)
PublisherIEEE
Volume2011
ISSN (Print)1946-147X
ISSN (Electronic)1946-1488

Conference

Conference21st International Conference on Field Programmable Logic and Applications, FPL 2011
Abbreviated titleFPL 2011
Country/TerritoryGreece
CityChania
Period5/09/117/09/11

Keywords

  • FPGA
  • Parsimony
  • Performance analysis
  • SIMD

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