FPGA core watermarking based on power signature analysis

Daniel Ziener*, Jürgen Teich

*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceedingConference contributionAcademicpeer-review

13 Citations (Scopus)

Abstract

In this paper we introduce a new method to watermark FPGA cores where the signature (watermark) is detected at the power supply pins of the FPGA. This is the first watermarking method, where the signature is extracted in this way. We are able to sign cores at the netlist as well as the bitfile level, so a wide spectrum of cores can be protected. The power watermarking method works with all types of FPGAs, but with Xilinx FPGAs, we can integrate the watermarking algorithms and the signature into the functionality of the watermarked core. So it is very hard to remove the watermark without destroying the core. We introduce a detection algorithm which can decode the signature from a voltage trace with high probability. Additionally, a second algorithm is introduced which improves the detection probability in case of considerable noise sources. Using this algorithm, it is possible to decode the signature even if other cores operate on the same device at the same time.

Original languageEnglish
Title of host publication2006 IEEE International Conference on Field Programmable Technology, FPT 2006
Pages205-212
Number of pages8
DOIs
Publication statusPublished - 2006
Externally publishedYes
Event2006 IEEE International Conference on Field Programmable Technology, FPT 2006 - Bangkok, Thailand
Duration: 13 Dec 200615 Dec 2006

Conference

Conference2006 IEEE International Conference on Field Programmable Technology, FPT 2006
Abbreviated titleFPT 2006
CountryThailand
CityBangkok
Period13/12/0615/12/06

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