Frequency divider

M. Acar (Inventor), Bram Nauta (Inventor), Dominicus Martinus Wilhelmus Leenaerts (Inventor)

    Research output: Patent

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    Abstract

    A frequency divider includes a first latch and a second latch. The first latch is configured to receive a clock signal. The first latch is cross-coupled to the second latch. The second latch includes a circuit configured as a low-pass filter. The second latch further includes a differential pair of transistors. Each of the transistors include a drain, a source and a gate. The gates of the least two transistors configured to receive a signal generated by the first latch. Additionally, the gates of the at least two other transistors are coupled to a control signal for determining a low-pass characteristic of the second latch.
    Original languageUndefined
    Patent numberUS7671641 B1
    Priority date4/03/05
    Publication statusPublished - 2 Mar 2010

    Keywords

    • IR-102633
    • METIS-237874
    • EWI-8932
    • Frequency Divider

      Leenaerts, D. M. W., Nauta, B. & Acar, M., 1 Dec 2005, Patent No. WO2005091506 (A8), Priority date 4 Mar 2005, Priority No. EP20040100996 2004011

      Research output: Patent

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