Frequency limitations of first-order gm-RC all-pass delay circuits

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    Abstract

    All-pass filter circuits can implement a time delay but, in practice, show delay and gain variations versus frequency, limiting their useful frequency range. This brief derives analytical equations to estimate this frequency range, given a certain maximum allowable budget for variation in delay and gain. We analyze and compare two well-known gm - RC first-order all-pass circuits, which can be compactly realized in CMOS technology and relate their delay variation to the main pole frequency. Modeling parasitic poles and putting a constraint on gain variation, equations for the maximum achievable pole frequency and delay variation versus frequency are derived. These equations are compared with simulation and used to design and compare delay cells satisfying given design goals.
    Original languageEnglish
    Pages (from-to)572-576
    Number of pages5
    JournalIEEE transactions on circuits and systems II: express briefs
    Volume60
    Issue number9
    DOIs
    Publication statusPublished - 1 Sep 2013

    Keywords

    • EWI-24322
    • IR-88879
    • METIS-302651
    • All-pass filter
    • Delay
    • True time delay
    • Phase shift
    • Phase filter
    • Filter optimization
    • Bandwidth
    • Frequency range

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