Skip to main navigation Skip to search Skip to main content

Frequency synthesiser

  • S. Drago (Inventor)
  • , Fabio Sebastiano (Inventor)
  • , Dominicus Martinus Wilhelmus Leenaerts (Inventor)
  • , Lucien Johannes Breems (Inventor)
  • , Bram Nauta (Inventor)

    Research output: Patent

    161 Downloads (Pure)

    Abstract

    A low power frequency synthesiser circuit (30) for a radio transceiver, the synthesiser circuit comprising: a digital controlled oscillator configured to generate an output signal having a frequency controlled by an input digital control word (DCW); a feedback loop connected between an output and an input of the digital controlled oscillator, the feedback loop configured to provide the digital control word to the input of the digital controlled oscillator from an error derived from an input frequency control word (FCW) and the output signal; and a duty cycle module connected to the digital controlled oscillator and the feedback loop, the duty cycle module configured to generate a plurality of control signals to periodically enable and disable the digital controlled oscillator for a set fraction of clock cycles of an input reference clock signal (RefClock).
    Original languageUndefined
    Patent numberUS2012 0139587 A1
    Priority date3/04/09
    Publication statusPublished - 7 Jul 2012

    Keywords

    • IR-101964
    • EWI-19227
    • METIS-276743

    Access to Document

      • Frequency Synthesiser

        Drago, S. (Inventor), Sebastiano, F. (Inventor), Leenaerts, D. M. W. (Inventor), Breems, L. J. (Inventor) & Nauta, B. (Inventor), 19 Jan 2016, Patent No. US 9240772 (B2), Priority date 3 Apr 2009, Priority No. EP20090157284 20090403

        Research output: Patent

        Open Access
        File

      Cite this