Functional layers for CIGS solar cell on-chip fabrication during post-processing

The ubiquitous deploying of wireless electronic devices due to pervasive computing results in the idea of Energy Scavenging, i.e., harvesting ambient energy from surroundings of the electronic devices [1]. As an approach to the most practical realization of such an energy scavenger, copper indium gallium selenium (CIGS) thin-film solar cells have attracted much attention due to the possibility to combine their reasonably high efficiency and low-temperature fabrication technology. The CIGS solar cells can be realized using CMOS compatible technology and are therefore suitable for CMOS post-processing and for their integration on a silicon chip as the energy scavenger.