Gate-capacitance extraction from RF C-V measurements

G.T. Sasse; R. de Kort; Jurriaan Schmitz

doi:10.1109/ESSDER.2004.1356501

Gate-capacitance extraction from RF C-V measurements

G.T. Sasse
, R. de Kort
, Jurriaan Schmitz

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Academic › peer-review

4 Citations (Scopus)

654 Downloads (Pure)

Abstract

n this work, a full two-port analysis of an RF C-V measurement set-up is given. This two-port analysis gives insight on the limitations of the commonly used gate capacitance extraction, based on the Y/sub 11/ parameter of the device. It is shown that the parasitics of the device can disturb the extracted gate capacitance and a new extraction scheme, based on the Z-matrix, is introduced that eliminates the effect of these parasitics. Measurement results prove the validity of this new extraction scheme, under different conditions.

Original language	Undefined
Title of host publication	The 34th European Solid-State Device Research conference, 2004
Place of Publication	Piscataway
Publisher	IEEE
Pages	113-116
Number of pages	4
ISBN (Print)	0780384784
DOIs	https://doi.org/10.1109/ESSDER.2004.1356501
Publication status	Published - 15 Nov 2004
Event	34th European Solid-State Device Research Conference, ESSDERC 2004 - Leuven, Belgium Duration: 21 Sept 2004 → 23 Sept 2004 Conference number: 34

Publication series

Name
Publisher	IEEE

Conference

Conference	34th European Solid-State Device Research Conference, ESSDERC 2004
Abbreviated title	ESSDERC
Country/Territory	Belgium
City	Leuven
Period	21/09/04 → 23/09/04

Keywords

IR-47970
MIS devices
EWI-15535
impedance matrix
METIS-219035
Semiconductor device measurement
Capacitance measurement

Access to Document

10.1109/ESSDER.2004.1356501

Cite this

@inproceedings{a6ecf9f1054e4a76a53edbe42d0e9a8d,

title = "Gate-capacitance extraction from RF C-V measurements",

abstract = "n this work, a full two-port analysis of an RF C-V measurement set-up is given. This two-port analysis gives insight on the limitations of the commonly used gate capacitance extraction, based on the Y/sub 11/ parameter of the device. It is shown that the parasitics of the device can disturb the extracted gate capacitance and a new extraction scheme, based on the Z-matrix, is introduced that eliminates the effect of these parasitics. Measurement results prove the validity of this new extraction scheme, under different conditions.",

keywords = "IR-47970, MIS devices, EWI-15535, impedance matrix, METIS-219035, Semiconductor device measurement, Capacitance measurement",

author = "G.T. Sasse and \{de Kort\}, R. and Jurriaan Schmitz",

year = "2004",

month = nov,

day = "15",

doi = "10.1109/ESSDER.2004.1356501",

language = "Undefined",

isbn = "0780384784",

publisher = "IEEE",

pages = "113--116",

booktitle = "The 34th European Solid-State Device Research conference, 2004",

address = "United States",

note = "34th European Solid-State Device Research Conference, ESSDERC 2004 ; Conference date: 21-09-2004 Through 23-09-2004",

}

TY - GEN

T1 - Gate-capacitance extraction from RF C-V measurements

AU - Sasse, G.T.

AU - de Kort, R.

AU - Schmitz, Jurriaan

N1 - Conference code: 34

PY - 2004/11/15

Y1 - 2004/11/15

N2 - n this work, a full two-port analysis of an RF C-V measurement set-up is given. This two-port analysis gives insight on the limitations of the commonly used gate capacitance extraction, based on the Y/sub 11/ parameter of the device. It is shown that the parasitics of the device can disturb the extracted gate capacitance and a new extraction scheme, based on the Z-matrix, is introduced that eliminates the effect of these parasitics. Measurement results prove the validity of this new extraction scheme, under different conditions.

AB - n this work, a full two-port analysis of an RF C-V measurement set-up is given. This two-port analysis gives insight on the limitations of the commonly used gate capacitance extraction, based on the Y/sub 11/ parameter of the device. It is shown that the parasitics of the device can disturb the extracted gate capacitance and a new extraction scheme, based on the Z-matrix, is introduced that eliminates the effect of these parasitics. Measurement results prove the validity of this new extraction scheme, under different conditions.

KW - IR-47970

KW - MIS devices

KW - EWI-15535

KW - impedance matrix

KW - METIS-219035

KW - Semiconductor device measurement

KW - Capacitance measurement

U2 - 10.1109/ESSDER.2004.1356501

DO - 10.1109/ESSDER.2004.1356501

M3 - Conference contribution

SN - 0780384784

SP - 113

EP - 116

BT - The 34th European Solid-State Device Research conference, 2004

PB - IEEE

CY - Piscataway

T2 - 34th European Solid-State Device Research Conference, ESSDERC 2004

Y2 - 21 September 2004 through 23 September 2004

ER -