Gate Oxide Reliability of Poly-Si and Poly-SiGe CMOS Devices

Vincent Etienne Houtsma

Gate Oxide Reliability of Poly-Si and Poly-SiGe CMOS Devices

Vincent Etienne Houtsma

Research output: Thesis › PhD Thesis - Research UT, graduation UT

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Abstract

This thesis focuses on the gate oxide reliability of poly silicon (poly-Si) and poly Silicon-Germanium(poly-Si0:7Ge0:3) dual gate CMOS devices. The conduction mechanism (I-V), Stress-Induced Leakage Current (SILC) and time-tobreakdown (tbd) of these devices on (ultra-)thin gate oxides is studied. P+ and n+-gates with poly-Si and poly-SiGe are used to study the in uence of gate workfunction on gate current and SILC current. Poly-SiGe is chosen since its allows modification of the workfunction of the gate for p+-poly gate devices. Moreover, it is fully compatible with (poly-)Si technology.

Original language	English
Qualification	Doctor of Philosophy
Awarding Institution	University of Twente
Supervisors/Advisors	Woerlee, P.H., Supervisor Holleman, J., Co-Supervisor
Award date	14 Jan 2000
Place of Publication	Enschede, The Netherlands
Publisher	Universiteit Twente
Print ISBNs	90-365-1391-X
Publication status	Published - 14 Jan 2000

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title = "Gate Oxide Reliability of Poly-Si and Poly-SiGe CMOS Devices",

abstract = "This thesis focuses on the gate oxide reliability of poly silicon (poly-Si) and poly Silicon-Germanium(poly-Si0:7Ge0:3) dual gate CMOS devices. The conduction mechanism (I-V), Stress-Induced Leakage Current (SILC) and time-tobreakdown (tbd) of these devices on (ultra-)thin gate oxides is studied. P+ and n+-gates with poly-Si and poly-SiGe are used to study the in uence of gate workfunction on gate current and SILC current. Poly-SiGe is chosen since its allows modification of the workfunction of the gate for p+-poly gate devices. Moreover, it is fully compatible with (poly-)Si technology.",

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year = "2000",

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language = "English",

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TY - THES

T1 - Gate Oxide Reliability of Poly-Si and Poly-SiGe CMOS Devices

AU - Houtsma, Vincent Etienne

PY - 2000/1/14

Y1 - 2000/1/14

N2 - This thesis focuses on the gate oxide reliability of poly silicon (poly-Si) and poly Silicon-Germanium(poly-Si0:7Ge0:3) dual gate CMOS devices. The conduction mechanism (I-V), Stress-Induced Leakage Current (SILC) and time-tobreakdown (tbd) of these devices on (ultra-)thin gate oxides is studied. P+ and n+-gates with poly-Si and poly-SiGe are used to study the in uence of gate workfunction on gate current and SILC current. Poly-SiGe is chosen since its allows modification of the workfunction of the gate for p+-poly gate devices. Moreover, it is fully compatible with (poly-)Si technology.

AB - This thesis focuses on the gate oxide reliability of poly silicon (poly-Si) and poly Silicon-Germanium(poly-Si0:7Ge0:3) dual gate CMOS devices. The conduction mechanism (I-V), Stress-Induced Leakage Current (SILC) and time-tobreakdown (tbd) of these devices on (ultra-)thin gate oxides is studied. P+ and n+-gates with poly-Si and poly-SiGe are used to study the in uence of gate workfunction on gate current and SILC current. Poly-SiGe is chosen since its allows modification of the workfunction of the gate for p+-poly gate devices. Moreover, it is fully compatible with (poly-)Si technology.

M3 - PhD Thesis - Research UT, graduation UT

SN - 90-365-1391-X

PB - Universiteit Twente

CY - Enschede, The Netherlands

ER -

Gate Oxide Reliability of Poly-Si and Poly-SiGe CMOS Devices

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