Abstract
The use of amorphously deposited silicon and fine-grained polysilicon as MOS gate material is discussed. A variety of deposition and anneal conditions was evaluated on MOS capacitors and transistors. Gate depletion and MOSFET matching have been studied as a function of deposition condition and gate activation temperature. It is shown that polysilicon gate material has better properties than α-Si for CMOS generations beyond 0.18μm.
Original language | English |
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Title of host publication | ESSDERC '99 |
Subtitle of host publication | proceedings of the 29th European Solid-State Device Research Conference : Leuven, Belgium, 13-15 September, 1999 |
Editors | R.P. Mertens, H. Grünbacher, H.E. Maes, G. Declerck |
Place of Publication | Piscataway, NJ |
Publisher | IEEE |
Pages | 156-159 |
Number of pages | 4 |
ISBN (Print) | 2-86332-245-1 |
Publication status | Published - 1 Jan 1999 |
Externally published | Yes |
Event | 29th European Solid-State Device Research Conference, ESSDERC 1999 - Leuven, Belgium Duration: 13 Sept 1999 → 15 Sept 1999 Conference number: 29 |
Conference
Conference | 29th European Solid-State Device Research Conference, ESSDERC 1999 |
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Abbreviated title | ESSDERC |
Country/Territory | Belgium |
City | Leuven |
Period | 13/09/99 → 15/09/99 |