Gate-workfunction engineering using poly-(Si,Ge) for high-performance 0.18 μm CMOS technology

Y. V. Ponomarev; C. Salm; J. Schmitz; P. H. Woerlee; P. A. Stolk; D. J. Gravesteijn

doi:10.1109/IEDM.1997.650509

Gate-workfunction engineering using poly-(Si,Ge) for high-performance 0.18 μm CMOS technology

Y. V. Ponomarev^*
, C. Salm
, J. Schmitz
, P. H. Woerlee
, P. A. Stolk
, D. J. Gravesteijn

^*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Academic › peer-review

33 Citations (Scopus)

1137 Downloads (Pure)

Abstract

We show that poly-SiGe can be readily integrated as a gate material into an existing CMOS technology to achieve significant increase in the transistor performance. In order to preserve the standard salicidation scheme, a buffer poly-Si layer is introduced in the gate stack. PMOST channel profiles are optimized to account for the change of the gate workfunction. High-performance CMOS 0.18 μm devices are manufactured using p- and n-type poly-Si/Si_0.8Ge_0.2 gates.

Original language	English
Title of host publication	International Electron Devices Meeting, 1997, Washington, DC, December 7-10, 1997
Subtitle of host publication	IEDM Technical Digest
Place of Publication	Piscataway, NJ
Publisher	IEEE
Pages	829-832
Number of pages	4
ISBN (Print)	0-7803-4100-7
DOIs	https://doi.org/10.1109/IEDM.1997.650509
Publication status	Published - 1997
Event	1997 International Electron Devices Meeting, IEDM 1997 - Washington, United States Duration: 7 Dec 1997 → 10 Dec 1997

Publication series

Name	Technical Digest - International Electron Devices Meeting, IEDM
Publisher	IEEE
ISSN (Print)	0163-1918

Conference

Conference	1997 International Electron Devices Meeting, IEDM 1997
Abbreviated title	IEDM
Country/Territory	United States
City	Washington
Period	7/12/97 → 10/12/97

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10.1109/IEDM.1997.650509

Gate-Workfunction Engineering Using Poly-(Si,Ge) for High-Performance 0,18µm CMOS TechnologySubmitted version, 380 KBLicence: Unspecified

Cite this

Ponomarev, Y. V., Salm, C., Schmitz, J., Woerlee, P. H., Stolk, P. A., & Gravesteijn, D. J. (1997). Gate-workfunction engineering using poly-(Si,Ge) for high-performance 0.18 μm CMOS technology. In International Electron Devices Meeting, 1997, Washington, DC, December 7-10, 1997: IEDM Technical Digest (pp. 829-832). (Technical Digest - International Electron Devices Meeting, IEDM). IEEE. https://doi.org/10.1109/IEDM.1997.650509

@inproceedings{5162271c52634eafa1d0f39577155f3a,

title = "Gate-workfunction engineering using poly-(Si,Ge) for high-performance 0.18 μm CMOS technology",

abstract = "We show that poly-SiGe can be readily integrated as a gate material into an existing CMOS technology to achieve significant increase in the transistor performance. In order to preserve the standard salicidation scheme, a buffer poly-Si layer is introduced in the gate stack. PMOST channel profiles are optimized to account for the change of the gate workfunction. High-performance CMOS 0.18 μm devices are manufactured using p- and n-type poly-Si/Si0.8Ge0.2 gates.",

author = "Ponomarev, \{Y. V.\} and C. Salm and J. Schmitz and Woerlee, \{P. H.\} and Stolk, \{P. A.\} and Gravesteijn, \{D. J.\}",

year = "1997",

doi = "10.1109/IEDM.1997.650509",

language = "English",

isbn = "0-7803-4100-7",

series = "Technical Digest - International Electron Devices Meeting, IEDM",

publisher = "IEEE",

pages = "829--832",

booktitle = "International Electron Devices Meeting, 1997, Washington, DC, December 7-10, 1997",

address = "United States",

note = "1997 International Electron Devices Meeting, IEDM 1997, IEDM ; Conference date: 07-12-1997 Through 10-12-1997",

}

Ponomarev, YV, Salm, C , Schmitz, J, Woerlee, PH, Stolk, PA & Gravesteijn, DJ 1997, Gate-workfunction engineering using poly-(Si,Ge) for high-performance 0.18 μm CMOS technology. in International Electron Devices Meeting, 1997, Washington, DC, December 7-10, 1997: IEDM Technical Digest. Technical Digest - International Electron Devices Meeting, IEDM, IEEE, Piscataway, NJ, pp. 829-832, 1997 International Electron Devices Meeting, IEDM 1997, Washington, District of Columbia, United States, 7/12/97. https://doi.org/10.1109/IEDM.1997.650509

Gate-workfunction engineering using poly-(Si,Ge) for high-performance 0.18 μm CMOS technology. / Ponomarev, Y. V.; Salm, C.; Schmitz, J. et al.
International Electron Devices Meeting, 1997, Washington, DC, December 7-10, 1997: IEDM Technical Digest. Piscataway, NJ: IEEE, 1997. p. 829-832 (Technical Digest - International Electron Devices Meeting, IEDM).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Academic › peer-review

TY - GEN

T1 - Gate-workfunction engineering using poly-(Si,Ge) for high-performance 0.18 μm CMOS technology

AU - Ponomarev, Y. V.

AU - Salm, C.

AU - Schmitz, J.

AU - Woerlee, P. H.

AU - Stolk, P. A.

AU - Gravesteijn, D. J.

PY - 1997

Y1 - 1997

N2 - We show that poly-SiGe can be readily integrated as a gate material into an existing CMOS technology to achieve significant increase in the transistor performance. In order to preserve the standard salicidation scheme, a buffer poly-Si layer is introduced in the gate stack. PMOST channel profiles are optimized to account for the change of the gate workfunction. High-performance CMOS 0.18 μm devices are manufactured using p- and n-type poly-Si/Si0.8Ge0.2 gates.

AB - We show that poly-SiGe can be readily integrated as a gate material into an existing CMOS technology to achieve significant increase in the transistor performance. In order to preserve the standard salicidation scheme, a buffer poly-Si layer is introduced in the gate stack. PMOST channel profiles are optimized to account for the change of the gate workfunction. High-performance CMOS 0.18 μm devices are manufactured using p- and n-type poly-Si/Si0.8Ge0.2 gates.

U2 - 10.1109/IEDM.1997.650509

DO - 10.1109/IEDM.1997.650509

M3 - Conference contribution

SN - 0-7803-4100-7

T3 - Technical Digest - International Electron Devices Meeting, IEDM

SP - 829

EP - 832

BT - International Electron Devices Meeting, 1997, Washington, DC, December 7-10, 1997

PB - IEEE

CY - Piscataway, NJ

T2 - 1997 International Electron Devices Meeting, IEDM 1997

Y2 - 7 December 1997 through 10 December 1997

ER -

Ponomarev YV, Salm C , Schmitz J, Woerlee PH, Stolk PA, Gravesteijn DJ. Gate-workfunction engineering using poly-(Si,Ge) for high-performance 0.18 μm CMOS technology. In International Electron Devices Meeting, 1997, Washington, DC, December 7-10, 1997: IEDM Technical Digest. Piscataway, NJ: IEEE. 1997. p. 829-832. (Technical Digest - International Electron Devices Meeting, IEDM). doi: 10.1109/IEDM.1997.650509

Gate-workfunction engineering using poly-(Si,Ge) for high-performance 0.18 μm CMOS technology

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