Hardware/Software Co-design Applied to Reed-Solomon Decoding for the DMB Standard

A.C. Dam; M.G.J. Lammertink; K.C. Rovers; J. Slagman; A.M. Wellink; G.K. Rauwerda; Gerardus Johannes Maria Smit

doi:10.1109/DSD.2006.59

Hardware/Software Co-design Applied to Reed-Solomon Decoding for the DMB Standard

A.C. Dam, M.G.J. Lammertink, K.C. Rovers, J. Slagman, A.M. Wellink, G.K. Rauwerda, Gerardus Johannes Maria Smit

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Academic › peer-review

1 Citation (Scopus)

202 Downloads (Pure)

Abstract

This paper addresses the implementation of Reed- Solomon decoding for battery-powered wireless devices. The scope of this paper is constrained by the Digital Media Broadcasting (DMB). The most critical element of the Reed-Solomon algorithm is implemented on two different reconfigurable hardware architectures: an FPGA and a coarse-grained architecture: the Montium, The remaining parts are executed on an ARM processor. The results of this research show that a co-design of the ARM together with an FPGA or a Montium leads to a substantial decrease in energy consumption. The energy consumption of syndrome calculation of the Reed- Solomon decoding algorithm is estimated for an FPGA and a Montium by means of simulations. The Montium proves to be more efficient.

Original language	Undefined
Title of host publication	Proceedings of the 9th EUROMICRO Conference on DIGITAL SYSTEM DESIGN Architectures, Methods and Tools (DSD 2006)
Place of Publication	Los Alamitos
Publisher	IEEE Computer Society
Pages	447-455
Number of pages	9
ISBN (Print)	0-7695-2609-8
DOIs	https://doi.org/10.1109/DSD.2006.59
Publication status	Published - 30 Aug 2006
Event	9th EUROMICRO Conference on Digital System Design, DSD 2006: Architectures, Methods and Tools - Dubrovnik, Croatia Duration: 30 Aug 2006 → 1 Sep 2006 Conference number: 9

Publication series

Name
Publisher	IEEE Computer Society
Number	2

Conference

Conference	9th EUROMICRO Conference on Digital System Design, DSD 2006
Abbreviated title	DSD
Country/Territory	Croatia
City	Dubrovnik
Period	30/08/06 → 1/09/06

Keywords

EWI-6170
CAES-EEA: Efficient Embedded Architectures
METIS-238097
IR-66208

Access to Document

10.1109/DSD.2006.59

http://doi.ieeecomputersociety.org/10.1109/DSD.2006.59

Cite this

Dam, A. C., Lammertink, M. G. J., Rovers, K. C., Slagman, J., Wellink, A. M., Rauwerda, G. K., & Smit, G. J. M. (2006). Hardware/Software Co-design Applied to Reed-Solomon Decoding for the DMB Standard. In Proceedings of the 9th EUROMICRO Conference on DIGITAL SYSTEM DESIGN Architectures, Methods and Tools (DSD 2006) (pp. 447-455). [10.1109/DSD.2006.59] IEEE Computer Society. https://doi.org/10.1109/DSD.2006.59

@inproceedings{0448845a5d344c39882a5f564ebeabbb,

title = "Hardware/Software Co-design Applied to Reed-Solomon Decoding for the DMB Standard",

abstract = "This paper addresses the implementation of Reed- Solomon decoding for battery-powered wireless devices. The scope of this paper is constrained by the Digital Media Broadcasting (DMB). The most critical element of the Reed-Solomon algorithm is implemented on two different reconfigurable hardware architectures: an FPGA and a coarse-grained architecture: the Montium, The remaining parts are executed on an ARM processor. The results of this research show that a co-design of the ARM together with an FPGA or a Montium leads to a substantial decrease in energy consumption. The energy consumption of syndrome calculation of the Reed- Solomon decoding algorithm is estimated for an FPGA and a Montium by means of simulations. The Montium proves to be more efficient.",

keywords = "EWI-6170, CAES-EEA: Efficient Embedded Architectures, METIS-238097, IR-66208",

author = "A.C. Dam and M.G.J. Lammertink and K.C. Rovers and J. Slagman and A.M. Wellink and G.K. Rauwerda and Smit, {Gerardus Johannes Maria}",

note = "10.1109/DSD.2006.59 ; null ; Conference date: 30-08-2006 Through 01-09-2006",

year = "2006",

month = aug,

day = "30",

doi = "10.1109/DSD.2006.59",

language = "Undefined",

isbn = "0-7695-2609-8",

publisher = "IEEE Computer Society",

number = "2",

pages = "447--455",

booktitle = "Proceedings of the 9th EUROMICRO Conference on DIGITAL SYSTEM DESIGN Architectures, Methods and Tools (DSD 2006)",

address = "United States",

}

Dam, AC, Lammertink, MGJ, Rovers, KC, Slagman, J, Wellink, AM, Rauwerda, GK & Smit, GJM 2006, Hardware/Software Co-design Applied to Reed-Solomon Decoding for the DMB Standard. in Proceedings of the 9th EUROMICRO Conference on DIGITAL SYSTEM DESIGN Architectures, Methods and Tools (DSD 2006)., 10.1109/DSD.2006.59, IEEE Computer Society, Los Alamitos, pp. 447-455, 9th EUROMICRO Conference on Digital System Design, DSD 2006, Dubrovnik, Croatia, 30/08/06. https://doi.org/10.1109/DSD.2006.59

Hardware/Software Co-design Applied to Reed-Solomon Decoding for the DMB Standard. / Dam, A.C.; Lammertink, M.G.J.; Rovers, K.C. et al.

Proceedings of the 9th EUROMICRO Conference on DIGITAL SYSTEM DESIGN Architectures, Methods and Tools (DSD 2006). Los Alamitos : IEEE Computer Society, 2006. p. 447-455 10.1109/DSD.2006.59.

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Academic › peer-review

TY - GEN

T1 - Hardware/Software Co-design Applied to Reed-Solomon Decoding for the DMB Standard

AU - Dam, A.C.

AU - Lammertink, M.G.J.

AU - Rovers, K.C.

AU - Slagman, J.

AU - Wellink, A.M.

AU - Rauwerda, G.K.

AU - Smit, Gerardus Johannes Maria

N1 - Conference code: 9

PY - 2006/8/30

Y1 - 2006/8/30

N2 - This paper addresses the implementation of Reed- Solomon decoding for battery-powered wireless devices. The scope of this paper is constrained by the Digital Media Broadcasting (DMB). The most critical element of the Reed-Solomon algorithm is implemented on two different reconfigurable hardware architectures: an FPGA and a coarse-grained architecture: the Montium, The remaining parts are executed on an ARM processor. The results of this research show that a co-design of the ARM together with an FPGA or a Montium leads to a substantial decrease in energy consumption. The energy consumption of syndrome calculation of the Reed- Solomon decoding algorithm is estimated for an FPGA and a Montium by means of simulations. The Montium proves to be more efficient.

AB - This paper addresses the implementation of Reed- Solomon decoding for battery-powered wireless devices. The scope of this paper is constrained by the Digital Media Broadcasting (DMB). The most critical element of the Reed-Solomon algorithm is implemented on two different reconfigurable hardware architectures: an FPGA and a coarse-grained architecture: the Montium, The remaining parts are executed on an ARM processor. The results of this research show that a co-design of the ARM together with an FPGA or a Montium leads to a substantial decrease in energy consumption. The energy consumption of syndrome calculation of the Reed- Solomon decoding algorithm is estimated for an FPGA and a Montium by means of simulations. The Montium proves to be more efficient.

KW - EWI-6170

KW - CAES-EEA: Efficient Embedded Architectures

KW - METIS-238097

KW - IR-66208

U2 - 10.1109/DSD.2006.59

DO - 10.1109/DSD.2006.59

M3 - Conference contribution

SN - 0-7695-2609-8

SP - 447

EP - 455

BT - Proceedings of the 9th EUROMICRO Conference on DIGITAL SYSTEM DESIGN Architectures, Methods and Tools (DSD 2006)

PB - IEEE Computer Society

CY - Los Alamitos

Y2 - 30 August 2006 through 1 September 2006

ER -

Dam AC, Lammertink MGJ, Rovers KC, Slagman J, Wellink AM, Rauwerda GK et al. Hardware/Software Co-design Applied to Reed-Solomon Decoding for the DMB Standard. In Proceedings of the 9th EUROMICRO Conference on DIGITAL SYSTEM DESIGN Architectures, Methods and Tools (DSD 2006). Los Alamitos: IEEE Computer Society. 2006. p. 447-455. 10.1109/DSD.2006.59 doi: 10.1109/DSD.2006.59