In this thesis we show the feasibility of Coarse Grained Data Flow Machines for high-throughput streaming non-manifest applications. The architecture of the Coarse Grained Data Flow Machine is derived from the classical data flow architecture and the scheduling of its processing elements is done dynamically in hardware. Since the implementation of such an architecture is strongly application dependent, a design flow and supporting software tools, are provided. This gives application designers the means by which the number of processing elements, buffer sizes and latencies of the architecture can be tuned.
|Award date||1 Feb 2006|
|Place of Publication||Enschede, Netherlands|
|Publication status||Published - Feb 2006|
- CAES-EEA: Efficient Embedded Architectures