High-performance Silicon-On-Glass VDMOS transistor for RF-power applications

N. Nenadovíc*, V. Cuoco, M.P. van der Heijden, L.K. Nanver, J.W. Slotboom, S J.C.H. Theeuwen, H.F.F. Jos

*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceedingConference contributionAcademicpeer-review

8 Citations (Scopus)

Abstract

A complete analysis of DC and RF performance of a novel SOI vertical DMOS transistor on glass and a conventional LDMOS transistor for RF power applications is presented. The analysis is based on MEDICI device simulations and the "Smoothie" database model for FET devices. An SOI VDMOST on glass with a breakdown of 115V, a specific on-resistance RONSP of 3mωcm2, an fTmax of 7.4 GHz at VDS=26V and a saturation current of 1.25 10-4 A/μm at VDS=10V is demonstrated. A device with 1mm long gate has PAE of 43% and power gain of 18.5 dB with 1dB compression point at POUT =26dBm. Since this SOI VDMOS device shows better linearity and higher power gain compared to conventional LDMOST, it would be the device of choice for RF power applications. Moreover, silicon-on-glass technology offers integration with high quality passives and the possibility to electroplate copper heat sinks only a few microns away from the active device area. Both features are very important for development of integrated power amplifiers.

Original languageEnglish
Title of host publication32nd European Solid-State Device Research Conference 2002
EditorsElena Gnani, Giorgio Baccarani, Massimo Rudan
PublisherIEEE Computer Society Press
Pages379-382
Number of pages4
ISBN (Electronic)8890084782
DOIs
Publication statusPublished - 1 Jan 2005
Externally publishedYes
Event32nd European Solid-State Device Research Conference, ESSDERC 2002 - Firenze, Italy
Duration: 24 Sep 200226 Sep 2002
Conference number: 32

Conference

Conference32nd European Solid-State Device Research Conference, ESSDERC 2002
Abbreviated titleESSDERC
Country/TerritoryItaly
CityFirenze
Period24/09/0226/09/02

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