High-speed lateral polysilicon photodiode in standard CMOS

S. Radovanovic; Anne J. Annema; Bram Nauta

doi:10.1109/ESSDERC.2003.1256928

High-speed lateral polysilicon photodiode in standard CMOS

S. Radovanovic, Anne J. Annema, Bram Nauta

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Academic › peer-review

11 Citations (Scopus)

29 Downloads (Pure)

Abstract

A high-performance lateral polysilicon photodiode was designed in standard 0.18 /spl mu/m CMOS technology. The device has a frequency bandwidth far in the GHz range: the measured bandwidth of the poly photodiode was 6 GHz, which figure was limited by the measurement equipment. The high intrinsic (physical) bandwidth is due to a short excess carrier lifetime. The external (electrical) bandwidth is also high because of a very small parasitic capacitance (< 0.1 pF). This is the best bandwidth performance among all reported diodes designed in a standard CMOS. The quantum efficiency of this poly photodiode is 0.2% due to the very small light sensitive diode volume. The diode active area is limited by a narrow depletion region and its depth by the technology.

Original language	English
Title of host publication	ESSDERC '03. 33rd Conference on European Solid-State Device Research, 2003
Publisher	IEEE
Pages	521-524
Number of pages	4
ISBN (Print)	0-7803-7999-3
DOIs	https://doi.org/10.1109/ESSDERC.2003.1256928
Publication status	Published - 16 Sept 2003
Event	33rd European Solid-State Device Research Conference, ESSDERC 2003 - Lisboa, Portugal Duration: 16 Sept 2003 → 18 Sept 2003 Conference number: 33

Conference

Conference	33rd European Solid-State Device Research Conference, ESSDERC 2003
Abbreviated title	ESSDERC
Country/Territory	Portugal
City	Lisboa
Period	16/09/03 → 18/09/03

Keywords

METIS-212884
IR-45671

Access to Document

10.1109/ESSDERC.2003.1256928

Cite this

@inproceedings{c77765cd74554e039b062a1167e91339,

title = "High-speed lateral polysilicon photodiode in standard CMOS",

abstract = "A high-performance lateral polysilicon photodiode was designed in standard 0.18 /spl mu/m CMOS technology. The device has a frequency bandwidth far in the GHz range: the measured bandwidth of the poly photodiode was 6 GHz, which figure was limited by the measurement equipment. The high intrinsic (physical) bandwidth is due to a short excess carrier lifetime. The external (electrical) bandwidth is also high because of a very small parasitic capacitance (< 0.1 pF). This is the best bandwidth performance among all reported diodes designed in a standard CMOS. The quantum efficiency of this poly photodiode is 0.2% due to the very small light sensitive diode volume. The diode active area is limited by a narrow depletion region and its depth by the technology.",

keywords = "METIS-212884, IR-45671",

author = "S. Radovanovic and Annema, {Anne J.} and Bram Nauta",

year = "2003",

month = sep,

day = "16",

doi = "10.1109/ESSDERC.2003.1256928",

language = "English",

isbn = "0-7803-7999-3",

pages = "521--524",

booktitle = "ESSDERC '03. 33rd Conference on European Solid-State Device Research, 2003",

publisher = "IEEE",

address = "United States",

note = "33rd European Solid-State Device Research Conference, ESSDERC 2003, ESSDERC ; Conference date: 16-09-2003 Through 18-09-2003",

}

TY - GEN

T1 - High-speed lateral polysilicon photodiode in standard CMOS

AU - Radovanovic, S.

AU - Annema, Anne J.

AU - Nauta, Bram

N1 - Conference code: 33

PY - 2003/9/16

Y1 - 2003/9/16

N2 - A high-performance lateral polysilicon photodiode was designed in standard 0.18 /spl mu/m CMOS technology. The device has a frequency bandwidth far in the GHz range: the measured bandwidth of the poly photodiode was 6 GHz, which figure was limited by the measurement equipment. The high intrinsic (physical) bandwidth is due to a short excess carrier lifetime. The external (electrical) bandwidth is also high because of a very small parasitic capacitance (< 0.1 pF). This is the best bandwidth performance among all reported diodes designed in a standard CMOS. The quantum efficiency of this poly photodiode is 0.2% due to the very small light sensitive diode volume. The diode active area is limited by a narrow depletion region and its depth by the technology.

AB - A high-performance lateral polysilicon photodiode was designed in standard 0.18 /spl mu/m CMOS technology. The device has a frequency bandwidth far in the GHz range: the measured bandwidth of the poly photodiode was 6 GHz, which figure was limited by the measurement equipment. The high intrinsic (physical) bandwidth is due to a short excess carrier lifetime. The external (electrical) bandwidth is also high because of a very small parasitic capacitance (< 0.1 pF). This is the best bandwidth performance among all reported diodes designed in a standard CMOS. The quantum efficiency of this poly photodiode is 0.2% due to the very small light sensitive diode volume. The diode active area is limited by a narrow depletion region and its depth by the technology.

KW - METIS-212884

KW - IR-45671

U2 - 10.1109/ESSDERC.2003.1256928

DO - 10.1109/ESSDERC.2003.1256928

M3 - Conference contribution

SN - 0-7803-7999-3

SP - 521

EP - 524

BT - ESSDERC '03. 33rd Conference on European Solid-State Device Research, 2003

PB - IEEE

T2 - 33rd European Solid-State Device Research Conference, ESSDERC 2003

Y2 - 16 September 2003 through 18 September 2003

ER -

High-speed lateral polysilicon photodiode in standard CMOS

Abstract

Conference

Keywords

Access to Document

Fingerprint

Cite this