High-speed lateral polysilicon photodiode in standard CMOS

S. Radovanovic, Anne J. Annema, Bram Nauta

    Research output: Chapter in Book/Report/Conference proceedingConference contributionAcademicpeer-review

    11 Citations (Scopus)
    17 Downloads (Pure)

    Abstract

    A high-performance lateral polysilicon photodiode was designed in standard 0.18 /spl mu/m CMOS technology. The device has a frequency bandwidth far in the GHz range: the measured bandwidth of the poly photodiode was 6 GHz, which figure was limited by the measurement equipment. The high intrinsic (physical) bandwidth is due to a short excess carrier lifetime. The external (electrical) bandwidth is also high because of a very small parasitic capacitance (< 0.1 pF). This is the best bandwidth performance among all reported diodes designed in a standard CMOS. The quantum efficiency of this poly photodiode is 0.2% due to the very small light sensitive diode volume. The diode active area is limited by a narrow depletion region and its depth by the technology.
    Original languageEnglish
    Title of host publicationESSDERC '03. 33rd Conference on European Solid-State Device Research, 2003
    PublisherIEEE
    Pages521-524
    Number of pages4
    ISBN (Print)0-7803-7999-3
    DOIs
    Publication statusPublished - 16 Sep 2003
    Event33rd European Solid-State Device Research Conference, ESSDERC 2003 - Lisboa, Portugal
    Duration: 16 Sep 200318 Sep 2003
    Conference number: 33

    Conference

    Conference33rd European Solid-State Device Research Conference, ESSDERC 2003
    Abbreviated titleESSDERC
    CountryPortugal
    CityLisboa
    Period16/09/0318/09/03

    Keywords

    • METIS-212884
    • IR-45671

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  • Cite this

    Radovanovic, S., Annema, A. J., & Nauta, B. (2003). High-speed lateral polysilicon photodiode in standard CMOS. In ESSDERC '03. 33rd Conference on European Solid-State Device Research, 2003 (pp. 521-524). IEEE. https://doi.org/10.1109/ESSDERC.2003.1256928