High speed VLSI neural network for high energy physics

Peter Masa; Klaas Hoen; Hans Wallinga

doi:10.1109/ICMNN.1994.593738

High speed VLSI neural network for high energy physics

Peter Masa, Klaas Hoen, Hans Wallinga

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Academic › peer-review

2 Citations (Scopus)

136 Downloads (Pure)

Abstract

A CMOS neural network IC is discussed which was designed for very high speed applications. The parallel architecture, analog computing and digital weight storage provides unprecedented computing speed combined with ease of use. The circuit classifies up to 70 dimensional vectors within 20 nanoseconds, performing 20 billion (2*1010) multiply-and-add operations per second, and has as high as 28-42 Gbits/second equivalent input bandwidth with less than 1 W dissipation. The synaptic weights can be directly downloaded from a host computer to the on on-chip SRAM. The full-custom, analog-digital chip implements a fully connected feedforward neural network with 70 inputs, 6 hidden layer neurons and one output neuron. A unique solution, a single chip neural network photon trigger for high-energy physics research is provided

Original language	English
Title of host publication	Proceedings of the Fourth International Conference on Microelectronics for Neural Networks and Fuzzy Systems, 1994
Place of Publication	Piscataway, NJ, USA
Publisher	IEEE
Pages	422-428
ISBN (Print)	0-8186-6710-9
DOIs	https://doi.org/10.1109/ICMNN.1994.593738
Publication status	Published - 24 Sept 1994
Event	4th International Conference on Microelectronics for Neural Networks and Fuzzy Systems, ICMNN 1994 - Turin, Italy Duration: 26 Sept 1994 → 28 Sept 1994 Conference number: 4

Conference

Conference	4th International Conference on Microelectronics for Neural Networks and Fuzzy Systems, ICMNN 1994
Abbreviated title	ICMNN
Country/Territory	Italy
City	Turin
Period	26/09/94 → 28/09/94

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10.1109/ICMNN.1994.593738

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@inproceedings{db28b730939e4c0994d9daffae405405,

title = "High speed VLSI neural network for high energy physics",

abstract = "A CMOS neural network IC is discussed which was designed for very high speed applications. The parallel architecture, analog computing and digital weight storage provides unprecedented computing speed combined with ease of use. The circuit classifies up to 70 dimensional vectors within 20 nanoseconds, performing 20 billion (2*1010) multiply-and-add operations per second, and has as high as 28-42 Gbits/second equivalent input bandwidth with less than 1 W dissipation. The synaptic weights can be directly downloaded from a host computer to the on on-chip SRAM. The full-custom, analog-digital chip implements a fully connected feedforward neural network with 70 inputs, 6 hidden layer neurons and one output neuron. A unique solution, a single chip neural network photon trigger for high-energy physics research is provided",

author = "Peter Masa and Klaas Hoen and Hans Wallinga",

year = "1994",

month = sep,

day = "24",

doi = "10.1109/ICMNN.1994.593738",

language = "English",

isbn = "0-8186-6710-9",

pages = "422--428",

booktitle = "Proceedings of the Fourth International Conference on Microelectronics for Neural Networks and Fuzzy Systems, 1994",

publisher = "IEEE",

address = "United States",

note = "4th International Conference on Microelectronics for Neural Networks and Fuzzy Systems, ICMNN 1994, ICMNN ; Conference date: 26-09-1994 Through 28-09-1994",

}

Masa, P, Hoen, K & Wallinga, H 1994, High speed VLSI neural network for high energy physics. in Proceedings of the Fourth International Conference on Microelectronics for Neural Networks and Fuzzy Systems, 1994. IEEE, Piscataway, NJ, USA, pp. 422-428, 4th International Conference on Microelectronics for Neural Networks and Fuzzy Systems, ICMNN 1994, Turin, Italy, 26/09/94. https://doi.org/10.1109/ICMNN.1994.593738

High speed VLSI neural network for high energy physics. / Masa, Peter; Hoen, Klaas; Wallinga, Hans.
Proceedings of the Fourth International Conference on Microelectronics for Neural Networks and Fuzzy Systems, 1994. Piscataway, NJ, USA: IEEE, 1994. p. 422-428.

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Academic › peer-review

TY - GEN

T1 - High speed VLSI neural network for high energy physics

AU - Masa, Peter

AU - Hoen, Klaas

AU - Wallinga, Hans

N1 - Conference code: 4

PY - 1994/9/24

Y1 - 1994/9/24

N2 - A CMOS neural network IC is discussed which was designed for very high speed applications. The parallel architecture, analog computing and digital weight storage provides unprecedented computing speed combined with ease of use. The circuit classifies up to 70 dimensional vectors within 20 nanoseconds, performing 20 billion (2*1010) multiply-and-add operations per second, and has as high as 28-42 Gbits/second equivalent input bandwidth with less than 1 W dissipation. The synaptic weights can be directly downloaded from a host computer to the on on-chip SRAM. The full-custom, analog-digital chip implements a fully connected feedforward neural network with 70 inputs, 6 hidden layer neurons and one output neuron. A unique solution, a single chip neural network photon trigger for high-energy physics research is provided

AB - A CMOS neural network IC is discussed which was designed for very high speed applications. The parallel architecture, analog computing and digital weight storage provides unprecedented computing speed combined with ease of use. The circuit classifies up to 70 dimensional vectors within 20 nanoseconds, performing 20 billion (2*1010) multiply-and-add operations per second, and has as high as 28-42 Gbits/second equivalent input bandwidth with less than 1 W dissipation. The synaptic weights can be directly downloaded from a host computer to the on on-chip SRAM. The full-custom, analog-digital chip implements a fully connected feedforward neural network with 70 inputs, 6 hidden layer neurons and one output neuron. A unique solution, a single chip neural network photon trigger for high-energy physics research is provided

U2 - 10.1109/ICMNN.1994.593738

DO - 10.1109/ICMNN.1994.593738

M3 - Conference contribution

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EP - 428

BT - Proceedings of the Fourth International Conference on Microelectronics for Neural Networks and Fuzzy Systems, 1994

PB - IEEE

CY - Piscataway, NJ, USA

T2 - 4th International Conference on Microelectronics for Neural Networks and Fuzzy Systems, ICMNN 1994

Y2 - 26 September 1994 through 28 September 1994

ER -

High speed VLSI neural network for high energy physics

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