TY - JOUR
T1 - Highly uniform sieving structure by corner lithography and silicon wet etching
AU - Schurink, B.
AU - Berenschot, J.W.
AU - Tiggelaar, R.M.
AU - Luttge, R.
PY - 2015/8/16
Y1 - 2015/8/16
N2 - We describe and demonstrate a fabrication process for silicon sieves with highly-uniform, micron-sized pyramidal shaped pores featuring squared apertures. These sieves are fabricated over areas of several square millimetres by means of double-side standard UV-lithography and wet etching in (1 0 0)-silicon. We intend to use these sieves for hydrodynamic cell capture devices (sieves), suitable for integration of electrodes for electrophysiological measurements of neuronal networks. For the fabrication process, standard plain silicon wafers are used, without the need for etch-stop layers or silicon-on-insulator. To ensure that the sieve contains pores with identical aperture sizes by merely the use of a timed etch-stop, sacrificial octahedral structures are formed underneath each pore by means of corner lithography. These sacrificial structures counteract non-uniformities in the thickness of the layer defining the sieve, resulting from the deep (>500 μm) anisotropic backside wet etch process. For our intended use, we aimed for pyramidal pits with a base length of 20 μm and an aperture at their tips of 3 μm over a circular sieve area with a diameter of 2.4 mm. In order to minimize the non-uniformity in sieve thickness, the deep back-etch is studied by applying KOH and TMAH etchants using variations in temperature of the etchant as well as variations in size and shape of the applied mask opening on the backside of the silicon substrate. With optimal conditions, both etchants can be used to successfully realize sieves. However, the best results are obtained for a back-etch in TMAH (25 wt%, 71 °C) with Triton X (0.1 vol%) as an additive. The later conditions yield a non-uniformity of 0.7 μm for a sieve thickness of 18 μm. Within the sieve area, all 900 square pores, evenly distributed with a 70 μm pitch, have an aperture of 3.2 ± 0.1 μm.
AB - We describe and demonstrate a fabrication process for silicon sieves with highly-uniform, micron-sized pyramidal shaped pores featuring squared apertures. These sieves are fabricated over areas of several square millimetres by means of double-side standard UV-lithography and wet etching in (1 0 0)-silicon. We intend to use these sieves for hydrodynamic cell capture devices (sieves), suitable for integration of electrodes for electrophysiological measurements of neuronal networks. For the fabrication process, standard plain silicon wafers are used, without the need for etch-stop layers or silicon-on-insulator. To ensure that the sieve contains pores with identical aperture sizes by merely the use of a timed etch-stop, sacrificial octahedral structures are formed underneath each pore by means of corner lithography. These sacrificial structures counteract non-uniformities in the thickness of the layer defining the sieve, resulting from the deep (>500 μm) anisotropic backside wet etch process. For our intended use, we aimed for pyramidal pits with a base length of 20 μm and an aperture at their tips of 3 μm over a circular sieve area with a diameter of 2.4 mm. In order to minimize the non-uniformity in sieve thickness, the deep back-etch is studied by applying KOH and TMAH etchants using variations in temperature of the etchant as well as variations in size and shape of the applied mask opening on the backside of the silicon substrate. With optimal conditions, both etchants can be used to successfully realize sieves. However, the best results are obtained for a back-etch in TMAH (25 wt%, 71 °C) with Triton X (0.1 vol%) as an additive. The later conditions yield a non-uniformity of 0.7 μm for a sieve thickness of 18 μm. Within the sieve area, all 900 square pores, evenly distributed with a 70 μm pitch, have an aperture of 3.2 ± 0.1 μm.
KW - Corner lithography
KW - Sacrificial structures
KW - Silicon sieves
KW - Uniform anisotropic wet etching
KW - 2023 OA procedure
UR - http://www.scopus.com/inward/record.url?scp=84922236351&partnerID=8YFLogxK
U2 - 10.1016/j.mee.2015.01.027
DO - 10.1016/j.mee.2015.01.027
M3 - Article
AN - SCOPUS:84922236351
SN - 0167-9317
VL - 144
SP - 12
EP - 18
JO - Microelectronic engineering
JF - Microelectronic engineering
ER -