Abstract
| Original language | Undefined |
|---|---|
| Title of host publication | Substrate Noise Coupling in Mixed Signal ASICs |
| Editors | S. Donnay, G. Gielen |
| Publisher | Kluwer Academic Publishers |
| Pages | 257-270 |
| Number of pages | 13 |
| ISBN (Print) | 1-4020-7381-X |
| DOIs | |
| Publication status | Published - 2003 |
Publication series
| Name | |
|---|---|
| Publisher | Kluwer Academic Publishers |
Keywords
- IR-67647
- EWI-14435
- METIS-212939
Cite this
}
How to deal with substrate bounce in analog circuits in epi-type CMOS technology. / Nauta, Bram; Hoogzaad, Gian; Hoogzaad, G.
Substrate Noise Coupling in Mixed Signal ASICs. ed. / S. Donnay; G. Gielen. Kluwer Academic Publishers, 2003. p. 257-270 10.1007/0-306-48170-7_12.Research output: Chapter in Book/Report/Conference proceeding › Chapter › Academic › peer-review
TY - CHAP
T1 - How to deal with substrate bounce in analog circuits in epi-type CMOS technology
AU - Nauta, Bram
AU - Hoogzaad, Gian
AU - Hoogzaad, G.
PY - 2003
Y1 - 2003
N2 - Substrate noise is one of the key problems in mixed analog/digital ICs. Although measures are known to reduce substrate noise, the noise will never be completely eliminated since this requires larger chip area or exotic packages and thus higher cost. Analog circuits on digital ICs simply have to be resistant to substrate noise. A general strategy is given which can be summarized as: the supply of the analog circuits must be referred to the substrate and the analog signals must be referred to a clean analog ground. Furthermore several design constraints are given to minimize the effect of substrate noise on analog. Two bandgap circuits are discussed and it is shown that apparently minor design issues, such as the connection of an n-well of a PMOS differential pair, can have large impact on the substrate sensitivity of this circuit. This has been verified by measurements.
AB - Substrate noise is one of the key problems in mixed analog/digital ICs. Although measures are known to reduce substrate noise, the noise will never be completely eliminated since this requires larger chip area or exotic packages and thus higher cost. Analog circuits on digital ICs simply have to be resistant to substrate noise. A general strategy is given which can be summarized as: the supply of the analog circuits must be referred to the substrate and the analog signals must be referred to a clean analog ground. Furthermore several design constraints are given to minimize the effect of substrate noise on analog. Two bandgap circuits are discussed and it is shown that apparently minor design issues, such as the connection of an n-well of a PMOS differential pair, can have large impact on the substrate sensitivity of this circuit. This has been verified by measurements.
KW - IR-67647
KW - EWI-14435
KW - METIS-212939
U2 - 10.1007/0-306-48170-7_12
DO - 10.1007/0-306-48170-7_12
M3 - Chapter
SN - 1-4020-7381-X
SP - 257
EP - 270
BT - Substrate Noise Coupling in Mixed Signal ASICs
A2 - Donnay, S.
A2 - Gielen, G.
PB - Kluwer Academic Publishers
ER -