I-V characteristics of integrated n+pn- reachthrough diodes

L.K. Nanver; E.J.G. Goudena

doi:10.1016/0038-1101(89)90142-1

I-V characteristics of integrated n+pn- reachthrough diodes

L.K. Nanver^*
, E.J.G. Goudena

^*Corresponding author for this work

Research output: Contribution to journal › Article › Academic › peer-review

3 Citations (Scopus)

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Abstract

Arsenic and boron implanted n⁺pn^- reachthrough diodes have been produced in a high-frequency BIFET (bipolar-JFET) process. The I-V characteristics are here measured on structures formed by the top-gate/channel/bottom-gate sandwich of the separated-gate JFET's. A variety of reachthrough voltages have been realized by adjusting the implantation conditoins of the channel. Theoretically the I-V characteristics of the diodes are evaluated by solving the Poisson equation in the 1-D case with asymmetric gates. Special attention is paid to the voltage V_FMRT necessary to reach the flatband condition after reachthrough. The lowest values, approaching the junction built-in voltage, are achieved if the doping of the reverse biased gate is several times higher than that of the forward biased gate, a situation which is realized in the present n⁺pn^- devices if V_GT>V_GB. High impact-ionization currents are measured just after reachthrough for devices with V_RT>1 V, which in the JFET's gives undesirable source/drain currents.

Original language	English
Pages (from-to)	637-645
Number of pages	9
Journal	Solid State Electronics
Volume	32
Issue number	8
DOIs	https://doi.org/10.1016/0038-1101(89)90142-1
Publication status	Published - 1 Jan 1989
Externally published	Yes

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title = "I-V characteristics of integrated n+pn- reachthrough diodes",

abstract = "Arsenic and boron implanted n+pn- reachthrough diodes have been produced in a high-frequency BIFET (bipolar-JFET) process. The I-V characteristics are here measured on structures formed by the top-gate/channel/bottom-gate sandwich of the separated-gate JFET's. A variety of reachthrough voltages have been realized by adjusting the implantation conditoins of the channel. Theoretically the I-V characteristics of the diodes are evaluated by solving the Poisson equation in the 1-D case with asymmetric gates. Special attention is paid to the voltage VFMRT necessary to reach the flatband condition after reachthrough. The lowest values, approaching the junction built-in voltage, are achieved if the doping of the reverse biased gate is several times higher than that of the forward biased gate, a situation which is realized in the present n+pn- devices if VGT>VGB. High impact-ionization currents are measured just after reachthrough for devices with VRT>1 V, which in the JFET's gives undesirable source/drain currents.",

author = "L.K. Nanver and E.J.G. Goudena",

year = "1989",

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AU - Nanver, L.K.

AU - Goudena, E.J.G.

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N2 - Arsenic and boron implanted n+pn- reachthrough diodes have been produced in a high-frequency BIFET (bipolar-JFET) process. The I-V characteristics are here measured on structures formed by the top-gate/channel/bottom-gate sandwich of the separated-gate JFET's. A variety of reachthrough voltages have been realized by adjusting the implantation conditoins of the channel. Theoretically the I-V characteristics of the diodes are evaluated by solving the Poisson equation in the 1-D case with asymmetric gates. Special attention is paid to the voltage VFMRT necessary to reach the flatband condition after reachthrough. The lowest values, approaching the junction built-in voltage, are achieved if the doping of the reverse biased gate is several times higher than that of the forward biased gate, a situation which is realized in the present n+pn- devices if VGT>VGB. High impact-ionization currents are measured just after reachthrough for devices with VRT>1 V, which in the JFET's gives undesirable source/drain currents.

AB - Arsenic and boron implanted n+pn- reachthrough diodes have been produced in a high-frequency BIFET (bipolar-JFET) process. The I-V characteristics are here measured on structures formed by the top-gate/channel/bottom-gate sandwich of the separated-gate JFET's. A variety of reachthrough voltages have been realized by adjusting the implantation conditoins of the channel. Theoretically the I-V characteristics of the diodes are evaluated by solving the Poisson equation in the 1-D case with asymmetric gates. Special attention is paid to the voltage VFMRT necessary to reach the flatband condition after reachthrough. The lowest values, approaching the junction built-in voltage, are achieved if the doping of the reverse biased gate is several times higher than that of the forward biased gate, a situation which is realized in the present n+pn- devices if VGT>VGB. High impact-ionization currents are measured just after reachthrough for devices with VRT>1 V, which in the JFET's gives undesirable source/drain currents.

U2 - 10.1016/0038-1101(89)90142-1

DO - 10.1016/0038-1101(89)90142-1

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JO - Solid State Electronics

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ER -

I-V characteristics of integrated n+pn- reachthrough diodes

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