IJTAG compatible analogue embedded instruments for MPSoC life-time prediction

Jerrin  Pathrose Vareed; Ghazanfar  Ali; Hans G. Kerkhoff

doi:10.1109/LATW.2018.8349691

IJTAG compatible analogue embedded instruments for MPSoC life-time prediction

Jerrin Pathrose Vareed, Ghazanfar Ali, Hans G. Kerkhoff

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Academic › peer-review

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Abstract

Decreasing reliability of nanometer CMOS technologies with each technology generation is a bottleneck for development of dependable Cyber Physical Systems. This paper presents two analogue health monitors, namely IDDT and temperature along with their integration to the IJTAG network for MPSoC life-time prediction. The monitors are integrated as embedded instruments in a MPSoC. A technique for dynamic synthesis of the analogue front-end for the IDDT instrument and an architecture for integrating analogue embedded instruments into an IJTAG network is introduced in this paper. The embedded instruments have been designed in TSMC 40nm CMOS technology.

Original language	English
Title of host publication	2018 IEEE 19th Latin-American Test Symposium (LATS)
Pages	1-4
Number of pages	4
ISBN (Electronic)	978-1-5386-1472-3
DOIs	https://doi.org/10.1109/LATW.2018.8349691
Publication status	Published - 26 Apr 2018
Event	19th IEEE Latin-American Test Symposium 2018 - Sao Paulo, Brazil Duration: 12 Mar 2018 → 16 Mar 2018 Conference number: 19 http://www.politecnica.pucrs.br/~sisc/LATS2018/

Conference

Conference	19th IEEE Latin-American Test Symposium 2018
Abbreviated title	LATS 2018
Country/Territory	Brazil
City	Sao Paulo
Period	12/03/18 → 16/03/18
Internet address	http://www.politecnica.pucrs.br/~sisc/LATS2018/

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10.1109/LATW.2018.8349691

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@inproceedings{1fa92807f6474daf8a10208bfbf1e9ae,

title = "IJTAG compatible analogue embedded instruments for MPSoC life-time prediction",

abstract = "Decreasing reliability of nanometer CMOS technologies with each technology generation is a bottleneck for development of dependable Cyber Physical Systems. This paper presents two analogue health monitors, namely IDDT and temperature along with their integration to the IJTAG network for MPSoC life-time prediction. The monitors are integrated as embedded instruments in a MPSoC. A technique for dynamic synthesis of the analogue front-end for the IDDT instrument and an architecture for integrating analogue embedded instruments into an IJTAG network is introduced in this paper. The embedded instruments have been designed in TSMC 40nm CMOS technology.",

author = "{Pathrose Vareed}, Jerrin and Ghazanfar Ali and Kerkhoff, {Hans G.}",

note = "Funding Information: This research has been conducted within the Horizon 2020 project IMMORTAL (644905) which is financially supported by the European Committee (EC) and the Netherlands Enterprise Agency (RVO). The authors would also like to thank Hans Manhaeve of Ridgetop Group Inc. for his suggestions. Publisher Copyright: {\textcopyright} 2018 IEEE.; 19th IEEE Latin-American Test Symposium 2018, LATS 2018 ; Conference date: 12-03-2018 Through 16-03-2018",

year = "2018",

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doi = "10.1109/LATW.2018.8349691",

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AU - Ali, Ghazanfar

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Y1 - 2018/4/26

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AB - Decreasing reliability of nanometer CMOS technologies with each technology generation is a bottleneck for development of dependable Cyber Physical Systems. This paper presents two analogue health monitors, namely IDDT and temperature along with their integration to the IJTAG network for MPSoC life-time prediction. The monitors are integrated as embedded instruments in a MPSoC. A technique for dynamic synthesis of the analogue front-end for the IDDT instrument and an architecture for integrating analogue embedded instruments into an IJTAG network is introduced in this paper. The embedded instruments have been designed in TSMC 40nm CMOS technology.

U2 - 10.1109/LATW.2018.8349691

DO - 10.1109/LATW.2018.8349691

M3 - Conference contribution

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T2 - 19th IEEE Latin-American Test Symposium 2018

Y2 - 12 March 2018 through 16 March 2018

ER -

IJTAG compatible analogue embedded instruments for MPSoC life-time prediction

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