IJTAG compatible analogue embedded instruments for MPSoC life-time prediction

Jerrin Pathrose Vareed, Ghazanfar Ali, Hans G. Kerkhoff

    Research output: Chapter in Book/Report/Conference proceedingConference contributionAcademicpeer-review

    6 Citations (Scopus)
    1 Downloads (Pure)

    Abstract

    Decreasing reliability of nanometer CMOS technologies with each technology generation is a bottleneck for development of dependable Cyber Physical Systems. This paper presents two analogue health monitors, namely IDDT and temperature along with their integration to the IJTAG network for MPSoC life-time prediction. The monitors are integrated as embedded instruments in a MPSoC. A technique for dynamic synthesis of the analogue front-end for the IDDT instrument and an architecture for integrating analogue embedded instruments into an IJTAG network is introduced in this paper. The embedded instruments have been designed in TSMC 40nm CMOS technology.
    Original languageEnglish
    Title of host publication2018 IEEE 19th Latin-American Test Symposium (LATS)
    Pages1-4
    Number of pages4
    ISBN (Electronic)978-1-5386-1472-3
    DOIs
    Publication statusPublished - 26 Apr 2018
    Event19th IEEE Latin-American Test Symposium 2018 - Sao Paulo, Brazil
    Duration: 12 Mar 201816 Mar 2018
    Conference number: 19
    http://www.politecnica.pucrs.br/~sisc/LATS2018/

    Conference

    Conference19th IEEE Latin-American Test Symposium 2018
    Abbreviated titleLATS 2018
    CountryBrazil
    CitySao Paulo
    Period12/03/1816/03/18
    Internet address

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