ZrO2 thin films have applications as dielectric or passivation layer in applications as CMOS gate dielectrics and Si solar cells. Furthermore, ZrO2 may be of interest as capping layer for protecting extreme ultraviolet (EUV) optics against chemical degradation processes. For these applications, it is critical that a homogeneous closed film is formed, which does not degrade the underneath layers, while the thickness is, depending on application, often restricted to a few nanometres. In this work, we studied the initial growth of ZrO2 films by reactive magnetron sputtering on top of amorphous Si (a-Si), SiNx and SiO2 by in vacuo low-energy ion scattering (LEIS). Since LEIS is selectively sensitive for the outermost atomic layer, it could be determined for which deposited thickness a closed layer was formed and how deposition parameters and surface passivation affect the sharpness of the ZrO2/Si interface. The information from surface peaks of Zr, O and the a-Si substrate was compared with the so-called tail signal from particles that scatter on sub-surface Zr atoms. As example, we studied representative conditions for metallic and oxidic mode reactive magnetron sputtering. In oxidic mode, where more high energy particles are present in the deposition plasma, 3.4 nm of ZrO2 was required to form a closed layer of ZrO2 on Si. In metallic mode, with a lower O to Ar ratio, intermixing could be reduced by a factor 2, such that a closed film of ZrO2 was formed at 1.7 nm deposited film thickness . In-vacuo X-ray photoelectron spectroscopy (XPS) confirmed that the formation of Zr silicate at the ZrO2/Si interface was reduced in the case of metallic mode deposition. Passivation of Si by reactive deposition of a SiNx or SiO2 barrier layer between the ZrO2 and Si did not change the required ZrO2 thickness for forming a closed layer, most likely because the Zr silicate formed during deposition already passivates the Si substrate. Thermal annealing studies in ambient atmosphere showed that 2 nm ZrO2 layers deposited with metallic mode sputtering protects the underlying a-Si substrate against oxidation up to 400 °C.
|Conference||64th AVS International Symposium & Exhibition 2017|
|Period||29/10/17 → 3/11/17|