Information processing with silicon-based nonlinear computing units

This thesis investigates the potential of in-materia computing, specifically through reconfigurable nonlinear processing units (RNPUs), to address the escalating demands for energy-efficient, high-performance computational systems that surpass the limitations of conventional CMOS-based digital circuits. As digital computing struggles to meet the processing speed, computational power, and energy efficiency required for modern applications, this work explores brain-inspired computing paradigms and their integration with existing digital platforms. A comprehensive review in Chapter 2 evaluates brain-inspired systems, identifying research gaps and proposing normalized energy efficiency metrics for fair comparisons across platforms. Chapter 3 introduces RNPUs, presenting novel dynamic characterizations that reveal their time-dependent computational properties, expanding beyond static behaviors reported in prior literature. Chapter 4 demonstrates the application of dynamic RNPU circuits for energy-efficient acoustic time-domain feature extraction, achieving superior performance compared to digital implementations on speech recognition benchmarks. By integrating RNPU-extracted features with an analogue in-memory computing (AIMC) chip, this work mitigates the von Neumann bottleneck, enhancing system compactness and efficiency. Chapter 5 proposes a hardware accelerator architecture leveraging RNPUs for both temporal (audio) and static (image) classification tasks, achieving over 9× energy savings compared to a 45-nm CMOS digital design, supported by a software distiller for automated training and deployment. Finally, Chapter 6 explores RNPU-based Kolmogorov-Arnold networks as an alternative to multi-layer perceptrons, demonstrating comparable performance with reduced computational costs and enhanced interpretability. Despite the volatility of current RNPUs, this thesis highlights their superior energy efficiency and nonlinear processing capabilities, paving the way for future scalable, low-power computing systems with integrated local memory for real-world applications.