Interface trap density estimation in FinFETs from the subthreshold current

J. Schmitz, B. Kaleli, P. Kuipers, N. van den Berg, S.M. Smits, R.J.E. Hueting

    Research output: Chapter in Book/Report/Conference proceedingConference contributionAcademicpeer-review

    1 Citation (Scopus)
    21 Downloads (Pure)

    Abstract

    In this work we present a measurement approach to determine the interface trap density in FinFETs as a function of their energy. It is based on the precise determination of the gate voltage dependent ideality factor of the subthreshold current in this device. The required measurement accuracy for temperature, drain current and transconductance is derived, and we propose an implementation for wafer-level device measurement on contemporary test set-ups. Exemplary interface trap distributions are shown as obtained from two FinFET device technologies, featuring the commonly observed bathtub shape.
    Original languageEnglish
    Title of host publication2016 International Conference on Microelectronic Test Structures (ICMTS)
    Place of PublicationPiscataway, NJ
    PublisherIEEE
    Pages164-167
    Number of pages4
    ISBN (Electronic)978-1-4673-8793-4 , 978-1-4673-8792-7
    ISBN (Print)978-1-4673-8791-0
    DOIs
    Publication statusPublished - 28 Mar 2016
    Event29th International Conference on Microelectronic Test Structures, ICMTS 2016 - Mielparque Yokohama, Yokohama, Japan
    Duration: 28 Mar 201631 Mar 2016
    Conference number: 29

    Publication series

    NameProceedings International Conference on Microelectronic Test Structures (ICMTS)
    PublisherIEEE
    Volume2016
    ISSN (Print)1071-9032
    ISSN (Electronic)2158-1029

    Conference

    Conference29th International Conference on Microelectronic Test Structures, ICMTS 2016
    Abbreviated titleICMTS
    CountryJapan
    CityYokohama
    Period28/03/1631/03/16

    Keywords

    • Interface states
    • MOS devices
    • Traps
    • Complementary MOSFETs (CMOSFETs)
    • Current
    • FinFETs

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