Interface trap density estimation in FinFETs using the gm/ID Method in the subthreshold regime

Boni K. Boksteen; Jurriaan Schmitz; Raymond J.E. Hueting

doi:10.1109/TED.2016.2539382

Interface trap density estimation in FinFETs using the gm/ID Method in the subthreshold regime

Boni K. Boksteen, Jurriaan Schmitz, Raymond J.E. Hueting

Research output: Contribution to journal › Article › Academic › peer-review

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Abstract

In this paper, we show that the subthreshold current-voltage characteristic can be used for estimating the interface trap density as a function of the energy in fully depleted symmetric metal-oxide-semiconductor devices with a minimum amount of modeling. The method is analyzed using TCAD simulations, and illustrated with the measurements on n-type silicon-on-insulator FinFETs. The results indicate that the trap density can be extracted between ~0.65 and 0.90 eV. This range is limited by resolution issues at the lowest current levels, and by the transition from subthreshold to saturation behavior at the high current levels.

Original language	English
Pages (from-to)	1814-1820
Number of pages	7
Journal	IEEE Transactions on Electron Devices
Volume	63
Issue number	5
DOIs	https://doi.org/10.1109/TED.2016.2539382
Publication status	Published - May 2016

Keywords

Subthreshold regime
Interface trap density estimation
High current levels
TCAD simulations
FinFET
Fully depleted symmetric metal-oxide-semiconductor devices
2023 OA procedure

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10.1109/TED.2016.2539382

ArticleFinal published version, 2.7 MBLicence: Taverne

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title = "Interface trap density estimation in FinFETs using the gm/ID Method in the subthreshold regime",

abstract = "In this paper, we show that the subthreshold current-voltage characteristic can be used for estimating the interface trap density as a function of the energy in fully depleted symmetric metal-oxide-semiconductor devices with a minimum amount of modeling. The method is analyzed using TCAD simulations, and illustrated with the measurements on n-type silicon-on-insulator FinFETs. The results indicate that the trap density can be extracted between ~0.65 and 0.90 eV. This range is limited by resolution issues at the lowest current levels, and by the transition from subthreshold to saturation behavior at the high current levels.",

keywords = "Subthreshold regime, Interface trap density estimation, High current levels, TCAD simulations, FinFET, Fully depleted symmetric metal-oxide-semiconductor devices, 2023 OA procedure",

author = "Boksteen, {Boni K.} and Jurriaan Schmitz and Hueting, {Raymond J.E.}",

year = "2016",

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doi = "10.1109/TED.2016.2539382",

language = "English",

volume = "63",

pages = "1814--1820",

journal = "IEEE Transactions on Electron Devices",

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T1 - Interface trap density estimation in FinFETs using the gm/ID Method in the subthreshold regime

AU - Boksteen, Boni K.

AU - Schmitz, Jurriaan

AU - Hueting, Raymond J.E.

PY - 2016/5

Y1 - 2016/5

N2 - In this paper, we show that the subthreshold current-voltage characteristic can be used for estimating the interface trap density as a function of the energy in fully depleted symmetric metal-oxide-semiconductor devices with a minimum amount of modeling. The method is analyzed using TCAD simulations, and illustrated with the measurements on n-type silicon-on-insulator FinFETs. The results indicate that the trap density can be extracted between ~0.65 and 0.90 eV. This range is limited by resolution issues at the lowest current levels, and by the transition from subthreshold to saturation behavior at the high current levels.

AB - In this paper, we show that the subthreshold current-voltage characteristic can be used for estimating the interface trap density as a function of the energy in fully depleted symmetric metal-oxide-semiconductor devices with a minimum amount of modeling. The method is analyzed using TCAD simulations, and illustrated with the measurements on n-type silicon-on-insulator FinFETs. The results indicate that the trap density can be extracted between ~0.65 and 0.90 eV. This range is limited by resolution issues at the lowest current levels, and by the transition from subthreshold to saturation behavior at the high current levels.

KW - Subthreshold regime

KW - Interface trap density estimation

KW - High current levels

KW - TCAD simulations

KW - FinFET

KW - Fully depleted symmetric metal-oxide-semiconductor devices

KW - 2023 OA procedure

U2 - 10.1109/TED.2016.2539382

DO - 10.1109/TED.2016.2539382

M3 - Article

SN - 0018-9383

VL - 63

SP - 1814

EP - 1820

JO - IEEE Transactions on Electron Devices

JF - IEEE Transactions on Electron Devices

IS - 5

ER -

Interface trap density estimation in FinFETs using the gm/ID Method in the subthreshold regime

Abstract

Keywords

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