Interface trap density estimation in FinFETs using the gm/ID Method in the subthreshold regime

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    Abstract

    In this paper, we show that the subthreshold current-voltage characteristic can be used for estimating the interface trap density as a function of the energy in fully depleted symmetric metal-oxide-semiconductor devices with a minimum amount of modeling. The method is analyzed using TCAD simulations, and illustrated with the measurements on n-type silicon-on-insulator FinFETs. The results indicate that the trap density can be extracted between ~0.65 and 0.90 eV. This range is limited by resolution issues at the lowest current levels, and by the transition from subthreshold to saturation behavior at the high current levels.
    Original languageUndefined
    Pages (from-to)1814-1820
    Number of pages7
    JournalIEEE transactions on electron devices
    Volume63
    Issue number5
    DOIs
    Publication statusPublished - May 2016

    Keywords

    • subthreshold regime
    • interface trap density estimation
    • high current levels
    • EWI-27011
    • IR-100408
    • TCAD simulations
    • FinFET
    • METIS-316924
    • fully depleted symmetric metal-oxide-semiconductor devices

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