Interference control by best-effort process duty-cycling in chip multi-processor systems for real-time medical image processing

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    Abstract

    Systems with chip multi-processors are currently used for several applications that have real-time requirements. In chip multi-processor architectures, many hardware resources such as parts of the cache hierarchy are shared between cores and by using such resources, applications can significantly interfere with each other. In previous work, we showed that a single X-ray imaging streaming applications can be executed with low jitter on such systems. However, it was assumed that only one application would be running on the system, which prevents system integration where multiple real-time and best- effort applications are executing on a single chip multi-processor. In this paper, we address the limited bandwidth in the cache hierarchy, which can cause threads to interfere with each other significantly. We propose a technique that implements cache bandwidth reservation in software, by dynamically duty-cycling best-effort applications, based on their cache bandwidth usages using processor performance counters in order to control the influence of best-effort applications on real-time applications. With this technique we can control the latency increase of real- time applications that is caused by best-effort application in order to satisfy real-time requirements with a minimal reduction in best-effort performance. The results of the experiments with real- life applications indicate that we can control the increase of the latency to such an extent that we can almost completely eliminate the influence of bandwidth sharing in the cache at the cost of best-effort performance.
    Original languageUndefined
    Title of host publicationThe Fifth International Conference on Resource Intensive Applications and Services, INTENSIVE 2013
    Place of PublicationCanada
    PublisherIARIA
    Pages-
    Number of pages7
    ISBN (Print)978-1-61208-258-5
    Publication statusPublished - 24 Mar 2013

    Publication series

    Name
    PublisherInternational Academy, Research, and Industry Association

    Keywords

    • EWI-23466
    • Jitter
    • Real Time
    • METIS-297710
    • IR-86384
    • Bandwidth
    • Control

    Cite this

    Westmijze, M., Bekooij, M. J. G., & Smit, G. J. M. (2013). Interference control by best-effort process duty-cycling in chip multi-processor systems for real-time medical image processing. In The Fifth International Conference on Resource Intensive Applications and Services, INTENSIVE 2013 (pp. -). Canada: IARIA.
    Westmijze, M. ; Bekooij, Marco Jan Gerrit ; Smit, Gerardus Johannes Maria. / Interference control by best-effort process duty-cycling in chip multi-processor systems for real-time medical image processing. The Fifth International Conference on Resource Intensive Applications and Services, INTENSIVE 2013. Canada : IARIA, 2013. pp. -
    @inproceedings{f4632a25e187480c84e9e67df9c2fba5,
    title = "Interference control by best-effort process duty-cycling in chip multi-processor systems for real-time medical image processing",
    abstract = "Systems with chip multi-processors are currently used for several applications that have real-time requirements. In chip multi-processor architectures, many hardware resources such as parts of the cache hierarchy are shared between cores and by using such resources, applications can significantly interfere with each other. In previous work, we showed that a single X-ray imaging streaming applications can be executed with low jitter on such systems. However, it was assumed that only one application would be running on the system, which prevents system integration where multiple real-time and best- effort applications are executing on a single chip multi-processor. In this paper, we address the limited bandwidth in the cache hierarchy, which can cause threads to interfere with each other significantly. We propose a technique that implements cache bandwidth reservation in software, by dynamically duty-cycling best-effort applications, based on their cache bandwidth usages using processor performance counters in order to control the influence of best-effort applications on real-time applications. With this technique we can control the latency increase of real- time applications that is caused by best-effort application in order to satisfy real-time requirements with a minimal reduction in best-effort performance. The results of the experiments with real- life applications indicate that we can control the increase of the latency to such an extent that we can almost completely eliminate the influence of bandwidth sharing in the cache at the cost of best-effort performance.",
    keywords = "EWI-23466, Jitter, Real Time, METIS-297710, IR-86384, Bandwidth, Control",
    author = "M. Westmijze and Bekooij, {Marco Jan Gerrit} and Smit, {Gerardus Johannes Maria}",
    year = "2013",
    month = "3",
    day = "24",
    language = "Undefined",
    isbn = "978-1-61208-258-5",
    publisher = "IARIA",
    pages = "--",
    booktitle = "The Fifth International Conference on Resource Intensive Applications and Services, INTENSIVE 2013",

    }

    Westmijze, M, Bekooij, MJG & Smit, GJM 2013, Interference control by best-effort process duty-cycling in chip multi-processor systems for real-time medical image processing. in The Fifth International Conference on Resource Intensive Applications and Services, INTENSIVE 2013. IARIA, Canada, pp. -.

    Interference control by best-effort process duty-cycling in chip multi-processor systems for real-time medical image processing. / Westmijze, M.; Bekooij, Marco Jan Gerrit; Smit, Gerardus Johannes Maria.

    The Fifth International Conference on Resource Intensive Applications and Services, INTENSIVE 2013. Canada : IARIA, 2013. p. -.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionAcademicpeer-review

    TY - GEN

    T1 - Interference control by best-effort process duty-cycling in chip multi-processor systems for real-time medical image processing

    AU - Westmijze, M.

    AU - Bekooij, Marco Jan Gerrit

    AU - Smit, Gerardus Johannes Maria

    PY - 2013/3/24

    Y1 - 2013/3/24

    N2 - Systems with chip multi-processors are currently used for several applications that have real-time requirements. In chip multi-processor architectures, many hardware resources such as parts of the cache hierarchy are shared between cores and by using such resources, applications can significantly interfere with each other. In previous work, we showed that a single X-ray imaging streaming applications can be executed with low jitter on such systems. However, it was assumed that only one application would be running on the system, which prevents system integration where multiple real-time and best- effort applications are executing on a single chip multi-processor. In this paper, we address the limited bandwidth in the cache hierarchy, which can cause threads to interfere with each other significantly. We propose a technique that implements cache bandwidth reservation in software, by dynamically duty-cycling best-effort applications, based on their cache bandwidth usages using processor performance counters in order to control the influence of best-effort applications on real-time applications. With this technique we can control the latency increase of real- time applications that is caused by best-effort application in order to satisfy real-time requirements with a minimal reduction in best-effort performance. The results of the experiments with real- life applications indicate that we can control the increase of the latency to such an extent that we can almost completely eliminate the influence of bandwidth sharing in the cache at the cost of best-effort performance.

    AB - Systems with chip multi-processors are currently used for several applications that have real-time requirements. In chip multi-processor architectures, many hardware resources such as parts of the cache hierarchy are shared between cores and by using such resources, applications can significantly interfere with each other. In previous work, we showed that a single X-ray imaging streaming applications can be executed with low jitter on such systems. However, it was assumed that only one application would be running on the system, which prevents system integration where multiple real-time and best- effort applications are executing on a single chip multi-processor. In this paper, we address the limited bandwidth in the cache hierarchy, which can cause threads to interfere with each other significantly. We propose a technique that implements cache bandwidth reservation in software, by dynamically duty-cycling best-effort applications, based on their cache bandwidth usages using processor performance counters in order to control the influence of best-effort applications on real-time applications. With this technique we can control the latency increase of real- time applications that is caused by best-effort application in order to satisfy real-time requirements with a minimal reduction in best-effort performance. The results of the experiments with real- life applications indicate that we can control the increase of the latency to such an extent that we can almost completely eliminate the influence of bandwidth sharing in the cache at the cost of best-effort performance.

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    KW - Jitter

    KW - Real Time

    KW - METIS-297710

    KW - IR-86384

    KW - Bandwidth

    KW - Control

    M3 - Conference contribution

    SN - 978-1-61208-258-5

    SP - -

    BT - The Fifth International Conference on Resource Intensive Applications and Services, INTENSIVE 2013

    PB - IARIA

    CY - Canada

    ER -

    Westmijze M, Bekooij MJG, Smit GJM. Interference control by best-effort process duty-cycling in chip multi-processor systems for real-time medical image processing. In The Fifth International Conference on Resource Intensive Applications and Services, INTENSIVE 2013. Canada: IARIA. 2013. p. -