Interleaved Planar Packaging Method of Multichip SiC Power Module for Thermal and Electrical Performance Improvement

Fengtao Yang, Lixin Jia, Laili Wang*, Fan Zhang, Binyu Wang, Cheng Zhao, Jianpeng Wang, Christoph Friedrich Bayer, Braham Ferreira

*Corresponding author for this work

Research output: Contribution to journalArticleAcademicpeer-review

55 Citations (Scopus)
360 Downloads (Pure)

Abstract

Double-sided cooling based on planar packaging method features better thermal performance than traditional single-sided cooling based on wire bonds. However, this method still faces thermal and electrical challenges in multichip SiC power modules. Specifically, one is severe thermal coupling among parallel bare dies, and the other is unbalanced current sharing due to unreasonable layout design. This article aims to explore the potentials of SiC power devices in power module, which are higher current capability and reliability. The proposed packaging method is called interleaved planar packaging and can get rid of the optimizing contradiction between thermal and electrical performance. In this packaging method, there are two functional units: interleaved switch unit and current commutator structure. Benefited from the two units’ electromagnetic and thermal decoupling effects, the interleaved power module features low loop inductance, balanced current, low coupling thermal resistance, and even thermal distributions. A 1200 V 3.25 mΩ half-bridge SiC power module based on interleaved planar packaging is fabricated and tested to verify this method's superiority.
Original languageEnglish
Article number9520279
Pages (from-to)1615-1629
Number of pages15
JournalIEEE Transactions on Power Electronics
Volume37
Issue number2
DOIs
Publication statusPublished - 1 Feb 2022

Keywords

  • Silicon carbide
  • Multichip modules
  • Switches
  • MOSFET
  • Electronic packaging thermal management
  • Substrates
  • Cooling
  • 2023 OA procedure

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