Interpretation of MOS transistor mismatch signature through statistical device simulations

Pietro Andricciola, P. Andricciola

Abstract

Semiconductor manufacturers daily fabricate millions of nominally identical integrated circuits made of supposedly identical components. However controlled the fabrication process can be, two components will always be slightly different when thoroughly compared. The comparison between two components is usually done using a certain parameter as estimator of the integrated circuit (IC) or transistor performance, e.g. a frequency of an oscillator or a current delivered by a transistor. What happens in reality is, for instance, that the frequencies of the identical oscillators fabricated, with the same process but in different foundries, or in different moments in the same foundry, will be different. Actually, even chips fabricated on the same wafer will not be exactly the same, as some fundamental characteristics of the fabrication process vary across the wafer. These sorts of variability are often deterministic. This means that a clear pattern appears after a significant number of observations
Original languageUndefined
Awarding Institution
  • University of Twente
Supervisors/Advisors
  • Schmitz, Jurriaan , Supervisor
  • Tuinhout, H.P., Advisor
Sponsors
Date of Award21 Dec 2011
Place of PublicationEnschede
Print ISBNs978-90-365-3289-1
DOIs
StatePublished - 21 Dec 2011

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Foundries
Integrated circuits
Transistors
Fabrication
Semiconductor materials

Keywords

  • EWI-21149
  • IR-79245
  • METIS-284955

Cite this

Andricciola, Pietro ; Andricciola, P.. / Interpretation of MOS transistor mismatch signature through statistical device simulations. Enschede, 2011. 149 p.
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Andricciola, P & Andricciola, P 2011, 'Interpretation of MOS transistor mismatch signature through statistical device simulations', University of Twente, Enschede. DOI: 10.3990/1.9789036532891

Interpretation of MOS transistor mismatch signature through statistical device simulations. / Andricciola, Pietro; Andricciola, P.

Enschede, 2011. 149 p.

Research output: Scientific › PhD Thesis - Research UT, graduation UT

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T1 - Interpretation of MOS transistor mismatch signature through statistical device simulations

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AU - Andricciola,P.

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N2 - Semiconductor manufacturers daily fabricate millions of nominally identical integrated circuits made of supposedly identical components. However controlled the fabrication process can be, two components will always be slightly different when thoroughly compared. The comparison between two components is usually done using a certain parameter as estimator of the integrated circuit (IC) or transistor performance, e.g. a frequency of an oscillator or a current delivered by a transistor. What happens in reality is, for instance, that the frequencies of the identical oscillators fabricated, with the same process but in different foundries, or in different moments in the same foundry, will be different. Actually, even chips fabricated on the same wafer will not be exactly the same, as some fundamental characteristics of the fabrication process vary across the wafer. These sorts of variability are often deterministic. This means that a clear pattern appears after a significant number of observations

AB - Semiconductor manufacturers daily fabricate millions of nominally identical integrated circuits made of supposedly identical components. However controlled the fabrication process can be, two components will always be slightly different when thoroughly compared. The comparison between two components is usually done using a certain parameter as estimator of the integrated circuit (IC) or transistor performance, e.g. a frequency of an oscillator or a current delivered by a transistor. What happens in reality is, for instance, that the frequencies of the identical oscillators fabricated, with the same process but in different foundries, or in different moments in the same foundry, will be different. Actually, even chips fabricated on the same wafer will not be exactly the same, as some fundamental characteristics of the fabrication process vary across the wafer. These sorts of variability are often deterministic. This means that a clear pattern appears after a significant number of observations

KW - EWI-21149

KW - IR-79245

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Andricciola P, Andricciola P. Interpretation of MOS transistor mismatch signature through statistical device simulations. Enschede, 2011. 149 p. Available from, DOI: 10.3990/1.9789036532891

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