The drain-source conductance of several MOS transistors has been studied as a function of the silicon surface-potential ψs in the weak and intermediate inversion region, under the condition of quasi-thermal equilibrium at room temperature. The silicon surface conductance per square ifG(in□ has been measured to vary exponentially with qψs/kT in weak inversion for excess minority carrier densities extending over the range 105-1011 cm−2. The exponential behaviour of G□ vs. qψs/kT appeared to be insensitive for the presence of interface states, when distributed around peak values as large (As) 6 × 1011/cm2 eV at ≈ 200 meV energy distance from midgap. Garrett and Brattain predicted theoretically that the excess minority carrier surface charge for weak inversion should also be an exponential function of qψs/kT, we conclude that the minority carrier mobility remains constant over the entire weak inversion region. A refined version of the low frequency CV method the so-called ‘split’ CV method has been introduced, which allows a simple determination of the charge trapped in interface states in weak and intermediate inversion as well as a determination of the bulk dope density.