IRIS: a firmware design methodology for SIMD architectures

J.W.M. Jacobs; Leroy van Engelen; Jan Kuper; Gerardus Johannes Maria Smit; Rui Dai

doi:10.1109/DSD.2008.58

IRIS: a firmware design methodology for SIMD architectures

J.W.M. Jacobs, Leroy van Engelen, Jan Kuper, Gerardus Johannes Maria Smit, Rui Dai

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Academic › peer-review

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Abstract

Developing code for SIMD type hardware architectures is a tedious job. This is caused by the absence of both a coherent methodological framework and a hardware independent tooling. Moreover, the inherently difficult nature of programming dedicated massively parallel embedded processors, complicates the matter. This paper describes a single framework, called IRIS, to generate code for SIMD architectures. This framework is illustrated with a concrete case ��?Stochastic Image Quantisation��?. IRIS is based on an incremental construction of executable representations, which converge to the final target implementation in a semi-automated way.

Original language	Undefined
Title of host publication	11th Euromicro Conference on Digital System Design (DSD08)
Publisher	IEEE Computer Society
Pages	609-617
Number of pages	9
ISBN (Print)	978-0-7695-3277-6
DOIs	https://doi.org/10.1109/DSD.2008.58
Publication status	Published - Sep 2008
Event	11th EUROMICRO Conference on Digital System Design, DSD 2008 - Parma, Italy Duration: 3 Sep 2008 → 5 Sep 2008 Conference number: 11

Publication series

Name
Publisher	IEEE Computer Society
Number	WoTUG-31

Conference

Conference	11th EUROMICRO Conference on Digital System Design, DSD 2008
Abbreviated title	DSD
Country/Territory	Italy
City	Parma
Period	3/09/08 → 5/09/08

Keywords

Firmware
Design Methodology
Design methodologyFunctional derivationFirmware
IR-65112
Functional derivation
METIS-254911
EWI-14115

Access to Document

10.1109/DSD.2008.58

Cite this

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title = "IRIS: a firmware design methodology for SIMD architectures",

abstract = "Developing code for SIMD type hardware architectures is a tedious job. This is caused by the absence of both a coherent methodological framework and a hardware independent tooling. Moreover, the inherently difficult nature of programming dedicated massively parallel embedded processors, complicates the matter. This paper describes a single framework, called IRIS, to generate code for SIMD architectures. This framework is illustrated with a concrete case ��?Stochastic Image Quantisation��?. IRIS is based on an incremental construction of executable representations, which converge to the final target implementation in a semi-automated way.",

keywords = "Firmware, Design Methodology, Design methodologyFunctional derivationFirmware, IR-65112, Functional derivation, METIS-254911, EWI-14115",

author = "J.W.M. Jacobs and {van Engelen}, Leroy and Jan Kuper and Smit, {Gerardus Johannes Maria} and Rui Dai",

note = "10.1109/DSD.2008.58 ; null ; Conference date: 03-09-2008 Through 05-09-2008",

year = "2008",

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doi = "10.1109/DSD.2008.58",

language = "Undefined",

isbn = "978-0-7695-3277-6",

publisher = "IEEE Computer Society",

number = "WoTUG-31",

pages = "609--617",

booktitle = "11th Euromicro Conference on Digital System Design (DSD08)",

address = "United States",

}

IRIS: a firmware design methodology for SIMD architectures. / Jacobs, J.W.M.; van Engelen, Leroy; Kuper, Jan ; Smit, Gerardus Johannes Maria; Dai, Rui.

11th Euromicro Conference on Digital System Design (DSD08). IEEE Computer Society, 2008. p. 609-617 10.1109/DSD.2008.58.

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Academic › peer-review

TY - GEN

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AU - van Engelen, Leroy

AU - Kuper, Jan

AU - Smit, Gerardus Johannes Maria

AU - Dai, Rui

N1 - Conference code: 11

PY - 2008/9

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N2 - Developing code for SIMD type hardware architectures is a tedious job. This is caused by the absence of both a coherent methodological framework and a hardware independent tooling. Moreover, the inherently difficult nature of programming dedicated massively parallel embedded processors, complicates the matter. This paper describes a single framework, called IRIS, to generate code for SIMD architectures. This framework is illustrated with a concrete case ��?Stochastic Image Quantisation��?. IRIS is based on an incremental construction of executable representations, which converge to the final target implementation in a semi-automated way.

AB - Developing code for SIMD type hardware architectures is a tedious job. This is caused by the absence of both a coherent methodological framework and a hardware independent tooling. Moreover, the inherently difficult nature of programming dedicated massively parallel embedded processors, complicates the matter. This paper describes a single framework, called IRIS, to generate code for SIMD architectures. This framework is illustrated with a concrete case ��?Stochastic Image Quantisation��?. IRIS is based on an incremental construction of executable representations, which converge to the final target implementation in a semi-automated way.

KW - Firmware

KW - Design Methodology

KW - Design methodologyFunctional derivationFirmware

KW - IR-65112

KW - Functional derivation

KW - METIS-254911

KW - EWI-14115

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BT - 11th Euromicro Conference on Digital System Design (DSD08)

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