Is RISC-V ready for Space? A Security Perspective

Luca Cassano, Stefano Di Mascio, Alessandro Palumbo, Alessandra Menicucci, Gianluca Furano, Giuseppe Bianchi, Marco Ottavi

Research output: Chapter in Book/Report/Conference proceedingConference contributionAcademicpeer-review

5 Citations (Scopus)
145 Downloads (Pure)

Abstract

Integrated circuits employed in space applications generally have very low-volume production and high performance requirements. Therefore, the adoption of Commercial-Off-The-Shelf (COTS) components and Third Party Intellectual Property cores (3PIPs) is of extreme interest to make system design, implementation and deployment cost-effective and viable w.r.t. performance. On the other hand, this design paradigm exposes the system to a number of security threats both at design-time and at runtime. In this paper, we discuss the security issues related to space applications mainly focusing on threats that come from the adoption of the well-known RISCV microprocessor. We highlight how Hardware Trojan horses (HTHs) and Microarchitectural Side-Channel Attacks (MSCAs) may compromise the overall system operation by either altering its nominal behavior or by stealing secret information. We discuss the security extensions provided by the RISC-V architecture as well as their limitations. The paper is concluded by an overview of the issues that are still open regarding the security of such microprocessor in the space domain.

Original languageEnglish
Title of host publicationProceedings - 35th IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT 2022
EditorsLuca Cassano, Sreejit Chakravarty, Alberto Bosio
PublisherIEEE
ISBN (Electronic)978-1-6654-5938-9
DOIs
Publication statusPublished - 30 Nov 2022
Event35th IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT 2022 - Austin, United States
Duration: 19 Oct 202221 Oct 2022
Conference number: 35

Publication series

NameProceedings - IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT
Volume2022-October
ISSN (Print)2576-1501
ISSN (Electronic)2765-933X

Conference

Conference35th IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT 2022
Abbreviated titleDFT 2022
Country/TerritoryUnited States
CityAustin
Period19/10/2221/10/22

Keywords

  • Hardware Security
  • Hardware Trojan Horses
  • Microarchitectural Side-Channel Attacks
  • Microprocessors
  • RISC-V
  • Space Applications.
  • 2023 OA procedure

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