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Jitter Limitations on Multi-Carrier Modulation

    Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Academic › peer-review

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    Abstract

    A feasibility study is made of an OFDM system based on analog multipliers and integrate-and-dump blocks, targeted at Gb/s copper interconnects. The effective amplitude variation of the integrator output caused by jitter is explained in an intuitive way by introducing correlation plots. For a given rms jitter and error rate, high frequency carriers allow for less modulation depth than low frequency carriers. A jitter limit on the total system bit rate is calculated, which is a function of rms jitter, bandwidth, and specified system symbol error rate. It is concluded that, because of the high sensitivity to timing errors inherent in OFDM, traditional PAM systems with equal bandwidth and error rate are more feasible.
    Original languageEnglish
    Title of host publication2005 IEEE Symposium on Circuits and Systems (ISCAS 2005)
    Place of PublicationPiscataway, NJ
    PublisherIEEE
    Pages6090-6093
    Number of pages4
    Volume6
    ISBN (Print)0780388348
    DOIs
    Publication statusPublished - May 2005
    EventIEEE International Symposium on Circuits and Systems, ISCAS 2005 - Kobe, Japan
    Duration: 23 May 2005 → 26 May 2005

    Conference

    ConferenceIEEE International Symposium on Circuits and Systems, ISCAS 2005
    Abbreviated titleISCAS
    Country/TerritoryJapan
    CityKobe
    Period23/05/05 → 26/05/05

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