Abstract
The gate current in a MOS structure can deform the result of a quasi-static capacitance-voltage measurement. In this paper, several correction methods are presented and discussed to compensate for this effect. Limitations of all methods are quantified and workarounds are proposed.
| Original language | Undefined |
|---|---|
| Title of host publication | International Conference of Microelectronic Test Structures ICMTS 2004 |
| Place of Publication | Piscataway |
| Publisher | IEEE |
| Pages | 179-181 |
| Number of pages | 3 |
| ISBN (Print) | 0780382625 |
| Publication status | Published - 25 Feb 2004 |
| Event | 17th International Conference on Microelectronic Test Structures, ICMTS 2004 - Yumebutai, Awaji, Japan Duration: 22 Mar 2004 → 25 Mar 2004 Conference number: 17 http://www.homepages.ed.ac.uk/ajw/ICMTS/prog04.pdf |
Publication series
| Name | |
|---|---|
| Publisher | IEEE Electron Devices Soc |
Conference
| Conference | 17th International Conference on Microelectronic Test Structures, ICMTS 2004 |
|---|---|
| Abbreviated title | ICMTS |
| Country/Territory | Japan |
| City | Yumebutai, Awaji |
| Period | 22/03/04 → 25/03/04 |
| Internet address |
Keywords
- METIS-217970
- EWI-15530
- compensation
- leakage currents
- MOSFET
- Semiconductor device measurement
- MOS capacitors
- IR-47466
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