Abstract
In many process steps of integrated circuits (IC’s) fabrication, silicon wafers are coming in contact with process liquids such as ultra pure water (UPW) and aqueous and non-aqueous chemical mixtures. During these process steps, liquid-borne particle contamination can deposit on the wafer surface. Particle contamination from UPW is an important factor influencing random yield loss of IC’s [1]. A number of yield models are used to predict yields including Poisson, Murphy, Seeds, and negative binomial models [2,3]. However, these models are based on the assumption that particles are randomly deposited on the wafer surface [4].
Original language | Undefined |
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Article number | 10.4028/www.scientific.net/SSP.145-146.65 |
Pages (from-to) | 65-68 |
Number of pages | 4 |
Journal | Solid state phenomena |
Volume | 145-146 |
Issue number | 10.4028/www.scientific.net/SSP.145-146.65 |
DOIs | |
Publication status | Published - 6 Jan 2009 |
Keywords
- SC-ICRY: Integrated Circuit Reliability and Yield
- METIS-263729
- IR-62726
- EWI-15029
- Silica particles
- Lateral capillary forces
- Deposition mechanism