In many process steps of integrated circuits (IC’s) fabrication, silicon wafers are coming in contact with process liquids such as ultra pure water (UPW) and aqueous and non-aqueous chemical mixtures. During these process steps, liquid-borne particle contamination can deposit on the wafer surface. Particle contamination from UPW is an important factor influencing random yield loss of IC’s . A number of yield models are used to predict yields including Poisson, Murphy, Seeds, and negative binomial models [2,3]. However, these models are based on the assumption that particles are randomly deposited on the wafer surface .
|Number of pages||4|
|Journal||Solid state phenomena|
|Publication status||Published - 6 Jan 2009|
- SC-ICRY: Integrated Circuit Reliability and Yield
- Silica particles
- Lateral capillary forces
- Deposition mechanism