Low-Jitter Multi-phase Clock Generation: A Comparison between DLLs and Shift Registers

Research output: Chapter in Book/Report/Conference proceedingConference contributionAcademicpeer-review

6 Citations (Scopus)
106 Downloads (Pure)

Abstract

Abstract—This paper shows that, for a given power budget, a shift register based multi-phase clock generator (MPCG) generates less jitter than a delay-locked loop (DLL) equivalent when both are realized with current mode logic (CML) circuits and white noise is assumed. This is due to the factor that the shift register MPCG has no jitter accumulation from one clock phase to the other as in the DLL based MPCG. For N-phase clock generation, the shift register MPCG needs a reference clock with N times higher frequency and thus requires a VCO with higher frequency than the DLL counterpart. However, we can show that this does not lead to additional power consumption.
Original languageEnglish
Title of host publicationProceedings of the 2007 IEEE International Symposium on Circuits and Systems (ISCAS 2007)
Place of PublicationPiscataway
PublisherIEEE Computer Society Press
Pages2854-2857
Number of pages4
ISBN (Print)1-4244-0921-7
DOIs
Publication statusPublished - 30 May 2007
EventIEEE International Symposium on Circuits and Systems, ISCAS 2007 - New Orleans, United States
Duration: 27 May 200730 May 2007
http://www.iscas2007.org/

Conference

ConferenceIEEE International Symposium on Circuits and Systems, ISCAS 2007
Abbreviated titleISCAS 2007
CountryUnited States
CityNew Orleans
Period27/05/0730/05/07
Internet address

Fingerprint

Shift registers
Jitter
Clocks
White noise

Keywords

  • EWI-10893
  • IR-58147
  • METIS-241846

Cite this

Gao, X., Klumperink, E. A. M., & Nauta, B. (2007). Low-Jitter Multi-phase Clock Generation: A Comparison between DLLs and Shift Registers. In Proceedings of the 2007 IEEE International Symposium on Circuits and Systems (ISCAS 2007) (pp. 2854-2857). Piscataway: IEEE Computer Society Press. https://doi.org/10.1109/ISCAS.2007.378767
Gao, X. ; Klumperink, Eric A.M. ; Nauta, Bram. / Low-Jitter Multi-phase Clock Generation: A Comparison between DLLs and Shift Registers. Proceedings of the 2007 IEEE International Symposium on Circuits and Systems (ISCAS 2007). Piscataway : IEEE Computer Society Press, 2007. pp. 2854-2857
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Gao, X, Klumperink, EAM & Nauta, B 2007, Low-Jitter Multi-phase Clock Generation: A Comparison between DLLs and Shift Registers. in Proceedings of the 2007 IEEE International Symposium on Circuits and Systems (ISCAS 2007). IEEE Computer Society Press, Piscataway, pp. 2854-2857, IEEE International Symposium on Circuits and Systems, ISCAS 2007, New Orleans, United States, 27/05/07. https://doi.org/10.1109/ISCAS.2007.378767

Low-Jitter Multi-phase Clock Generation: A Comparison between DLLs and Shift Registers. / Gao, X.; Klumperink, Eric A.M.; Nauta, Bram.

Proceedings of the 2007 IEEE International Symposium on Circuits and Systems (ISCAS 2007). Piscataway : IEEE Computer Society Press, 2007. p. 2854-2857.

Research output: Chapter in Book/Report/Conference proceedingConference contributionAcademicpeer-review

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AB - Abstract—This paper shows that, for a given power budget, a shift register based multi-phase clock generator (MPCG) generates less jitter than a delay-locked loop (DLL) equivalent when both are realized with current mode logic (CML) circuits and white noise is assumed. This is due to the factor that the shift register MPCG has no jitter accumulation from one clock phase to the other as in the DLL based MPCG. For N-phase clock generation, the shift register MPCG needs a reference clock with N times higher frequency and thus requires a VCO with higher frequency than the DLL counterpart. However, we can show that this does not lead to additional power consumption.

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Gao X, Klumperink EAM, Nauta B. Low-Jitter Multi-phase Clock Generation: A Comparison between DLLs and Shift Registers. In Proceedings of the 2007 IEEE International Symposium on Circuits and Systems (ISCAS 2007). Piscataway: IEEE Computer Society Press. 2007. p. 2854-2857 https://doi.org/10.1109/ISCAS.2007.378767