TY - JOUR
T1 - Low-loss highly tolerant flip-chip couplers for hybrid integration of Si3N4 and polymer waveguides
AU - Mu, Jinfeng
AU - Alexoudi, Theonitsa
AU - Yong, Yean-Sheng
AU - Vázquez-Córdova, Sergio A.
AU - Dijkstra, Meindert
AU - Wörhoff, Kerstin
AU - Duis, Jeroen
AU - García Blanco, Sonia M.
PY - 2016
Y1 - 2016
N2 - In this letter, low-loss and highly fabrication-tolerant flip-chip bonded vertical couplers under single-mode condition are demonstrated for the integration of a polymer waveguide chip onto the Si3N4/SiO2 passive platform. The passively aligned vertical couplers have a lateral misalignment between polymer and Si3N4 waveguide cores of ±1.25 μm. Low-loss operation has been experimentally demonstrated over a wide spectral window of 1480-1560 nm, with measured coupler losses below 0.8 dB for Si3N4 taper angles below 1.2°, in good agreement with the calculated values. Furthermore, thermal shock test results show less than 0.1 dB degradation, indicating a robust coupling performance.
AB - In this letter, low-loss and highly fabrication-tolerant flip-chip bonded vertical couplers under single-mode condition are demonstrated for the integration of a polymer waveguide chip onto the Si3N4/SiO2 passive platform. The passively aligned vertical couplers have a lateral misalignment between polymer and Si3N4 waveguide cores of ±1.25 μm. Low-loss operation has been experimentally demonstrated over a wide spectral window of 1480-1560 nm, with measured coupler losses below 0.8 dB for Si3N4 taper angles below 1.2°, in good agreement with the calculated values. Furthermore, thermal shock test results show less than 0.1 dB degradation, indicating a robust coupling performance.
KW - 2023 OA procedure
U2 - 10.1109/LPT.2016.2616021
DO - 10.1109/LPT.2016.2616021
M3 - Article
SN - 1041-1135
VL - 28
SP - 2748
EP - 2751
JO - IEEE photonics technology letters
JF - IEEE photonics technology letters
IS - 23
ER -