Low-temperature solid-phase epitaxy of defect-free aluminum p +-doped silicon for nanoscale device applications

Yann Civale; Lis K. Nanver; Peter Hadley; Egbert J.G. Goudena; Henk W. Van Zeijl; Hugo Schellevis

doi:10.1557/PROC-0940-P05-04

Low-temperature solid-phase epitaxy of defect-free aluminum p ⁺-doped silicon for nanoscale device applications

Yann Civale^*, Lis K. Nanver, Peter Hadley, Egbert J.G. Goudena, Henk W. Van Zeijl, Hugo Schellevis

^*Corresponding author for this work

Research output: Contribution to journal › Conference article › Academic › peer-review

1 Citation (Scopus)

Abstract

A solid phase epitaxy (SPE) technique was developed to grow p⁺ aluminum-doped crystalline Si in a fully CMOS compatible process. This paper describes the experimental conditions leading to the selective growth of nanoscale single crystals where the location and dimensions are well controlled, even in the sub-100 nm range. The SPE Si crystals are defined by conventional lithography and show excellent electrical characteristics. Fifty-nanometer-thick p⁺ SPE Si crystals were used to fabricate p⁺-n-p bipolar junction transistors. The remarkable control of the whole process, even in the sub-100 nm range, make this module directly usable for Si-based nanodevices.

Original language	English
Pages (from-to)	1-6
Number of pages	6
Journal	Materials Research Society Symposium Proceedings
Volume	940
DOIs	https://doi.org/10.1557/PROC-0940-P05-04
Publication status	Published - 1 Dec 2006
Externally published	Yes
Event	2006 MRS Spring Meeting & Exhibit - San Francisco, United States Duration: 17 Apr 2006 → 21 Apr 2006 https://www.mrs.org/spring2006

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@article{9faac99f915f4a95b48342a28f5d5206,

title = "Low-temperature solid-phase epitaxy of defect-free aluminum p +-doped silicon for nanoscale device applications",

abstract = "A solid phase epitaxy (SPE) technique was developed to grow p+ aluminum-doped crystalline Si in a fully CMOS compatible process. This paper describes the experimental conditions leading to the selective growth of nanoscale single crystals where the location and dimensions are well controlled, even in the sub-100 nm range. The SPE Si crystals are defined by conventional lithography and show excellent electrical characteristics. Fifty-nanometer-thick p+ SPE Si crystals were used to fabricate p+-n-p bipolar junction transistors. The remarkable control of the whole process, even in the sub-100 nm range, make this module directly usable for Si-based nanodevices.",

author = "Yann Civale and Nanver, {Lis K.} and Peter Hadley and Goudena, {Egbert J.G.} and {Van Zeijl}, {Henk W.} and Hugo Schellevis",

year = "2006",

month = dec,

day = "1",

doi = "10.1557/PROC-0940-P05-04",

language = "English",

volume = "940",

pages = "1--6",

journal = "Materials Research Society symposia proceedings",

issn = "0272-9172",

publisher = "Materials Research Society",

note = "2006 MRS Spring Meeting & Exhibit ; Conference date: 17-04-2006 Through 21-04-2006",

url = "https://www.mrs.org/spring2006",

}

TY - JOUR

T1 - Low-temperature solid-phase epitaxy of defect-free aluminum p +-doped silicon for nanoscale device applications

AU - Civale, Yann

AU - Nanver, Lis K.

AU - Hadley, Peter

AU - Goudena, Egbert J.G.

AU - Van Zeijl, Henk W.

AU - Schellevis, Hugo

PY - 2006/12/1

Y1 - 2006/12/1

N2 - A solid phase epitaxy (SPE) technique was developed to grow p+ aluminum-doped crystalline Si in a fully CMOS compatible process. This paper describes the experimental conditions leading to the selective growth of nanoscale single crystals where the location and dimensions are well controlled, even in the sub-100 nm range. The SPE Si crystals are defined by conventional lithography and show excellent electrical characteristics. Fifty-nanometer-thick p+ SPE Si crystals were used to fabricate p+-n-p bipolar junction transistors. The remarkable control of the whole process, even in the sub-100 nm range, make this module directly usable for Si-based nanodevices.

AB - A solid phase epitaxy (SPE) technique was developed to grow p+ aluminum-doped crystalline Si in a fully CMOS compatible process. This paper describes the experimental conditions leading to the selective growth of nanoscale single crystals where the location and dimensions are well controlled, even in the sub-100 nm range. The SPE Si crystals are defined by conventional lithography and show excellent electrical characteristics. Fifty-nanometer-thick p+ SPE Si crystals were used to fabricate p+-n-p bipolar junction transistors. The remarkable control of the whole process, even in the sub-100 nm range, make this module directly usable for Si-based nanodevices.

UR - http://www.scopus.com/inward/record.url?scp=33947699983&partnerID=8YFLogxK

U2 - 10.1557/PROC-0940-P05-04

DO - 10.1557/PROC-0940-P05-04

M3 - Conference article

AN - SCOPUS:33947699983

VL - 940

SP - 1

EP - 6

JO - Materials Research Society symposia proceedings

JF - Materials Research Society symposia proceedings

SN - 0272-9172

T2 - 2006 MRS Spring Meeting & Exhibit

Y2 - 17 April 2006 through 21 April 2006

ER -

Low-temperature solid-phase epitaxy of defect-free aluminum p ⁺-doped silicon for nanoscale device applications

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