Mapping of DSP Algorithms on the Montium Architecture

    Research output: Chapter in Book/Report/Conference proceedingConference contributionAcademicpeer-review

    25 Citations (Scopus)
    13 Downloads (Pure)

    Abstract

    In battery operated mobile devices there is a growing need for flexible high-performance architectures due to the limited amount of available energy and the increasing demand of processing power. Course grained reconfigurable architectures could be the key to more energy-efficient, yet programmable systems. In this paper a course-grained reconfigurable architecture, called Montium, is presented. Several mappings of commonly used digital signal processing algorithms are shown to demonstrate the flexibility of this architecture.
    Original languageUndefined
    Title of host publicationProceedings of RAW 2003
    Place of PublicationNice, France
    PublisherIEEE
    Pages-
    Number of pages6
    ISBN (Print)0-7695-1926-1
    DOIs
    Publication statusPublished - Apr 2003
    Event10th Reconfigurable Architectures Workshop, RAW 2003 - Nice, France
    Duration: 22 Apr 200322 Apr 2003
    Conference number: 10
    http://www.ece.lsu.edu/vaidy/raw03/

    Publication series

    Name
    PublisherIEEE

    Conference

    Conference10th Reconfigurable Architectures Workshop, RAW 2003
    Abbreviated titleRAW
    CountryFrance
    CityNice
    Period22/04/0322/04/03
    Internet address

    Keywords

    • METIS-214831
    • EWI-1516
    • CAES-EEA: Efficient Embedded Architectures
    • IR-46379

    Cite this

    Heysters, P. M., & Smit, G. J. M. (2003). Mapping of DSP Algorithms on the Montium Architecture. In Proceedings of RAW 2003 (pp. -). Nice, France: IEEE. https://doi.org/10.1109/IPDPS.2003.1213333