In this paper we present a method for mapping streaming applications, with real-time requirements, onto a reconfigurable MPSoC. In this method, the performance of the hardware architecture (the reconfigurable Processing Element, the Network Interface and the Network-on-Chip) is integrated in the performance models of the applications. In this way the performance of the mapped application can be determined at run-time. A predictable NoC (guaranteed bandwidth and bounded latency), a predictable Network Interface and a predictable Processing Element are key requirements for our approach.
|Publisher||IEEE Circuits and Systems Society|
|Conference||International Symposium on System-on-Chip (SoC 2007)|
|Period||19/11/07 → 21/11/07|
|Other||19-21 Nov 2007|
- EC Grant Agreement nr.: FP6/001908