Material-inversion solid-phase epitaxy of p+ Si for elevated junctions

Y. Civale; L.K. Nanver; H. Schellevis

doi:10.1149/1.2356268

Material-inversion solid-phase epitaxy of p⁺ Si for elevated junctions

Y. Civale^*, L.K. Nanver, H. Schellevis

^*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Academic › peer-review

1 Citation (Scopus)

Abstract

A solid-phase epitaxy (SPE) process that forms ultra-shallow abrupt aluminum p⁺-doped Si islands has been studied for deposition temperatures from 400 to 500 °C. The growth process gives a very uniform composition of the p⁺ layer and an abrupt doping transition to the Si substrate. Low ohmic contacting and near-ideal diode characteristics are reliably obtained. copyright The Electrochemical Society.

Original language	English
Title of host publication	Advanced Gate Stack, Source/Drain, and Channel Engineering for Si-Based CMOS 2: New Materials, Processes, and Equipment
Editors	F. Roozeboom, D.-L. Kwong, H. Iwai, M.C. Öztürk, P.J. Timans, E. Gusev
Place of Publication	Pennington, N.J.
Publisher	The Electrochemical Society Inc.
Pages	97-103
Number of pages	7
ISBN (Print)	1-56677-502-7
DOIs	https://doi.org/10.1149/1.2356268
Publication status	Published - 1 Dec 2006
Externally published	Yes
Event	210th Electrochemical Society Meeting, ECS 2006 - Cancún, Mexico Duration: 29 Oct 2006 → 3 Nov 2006

Publication series

Name	ECS transactions
Publisher	The Electrochemical Society Inc.
Number	2
Volume	3
ISSN (Print)	1938-5862

Conference

Conference	210th Electrochemical Society Meeting, ECS 2006
Abbreviated title	ECS 2006
Country	Mexico
City	Cancún
Period	29/10/06 → 3/11/06

Access to Document

10.1149/1.2356268

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Civale, Y., Nanver, L. K., & Schellevis, H. (2006). Material-inversion solid-phase epitaxy of p⁺ Si for elevated junctions. In F. Roozeboom, D-L. Kwong, H. Iwai, M. C. Öztürk, P. J. Timans, & E. Gusev (Eds.), Advanced Gate Stack, Source/Drain, and Channel Engineering for Si-Based CMOS 2: New Materials, Processes, and Equipment (pp. 97-103). (ECS transactions; Vol. 3, No. 2). The Electrochemical Society Inc.. https://doi.org/10.1149/1.2356268

Civale, Y. ; Nanver, L.K. ; Schellevis, H. / Material-inversion solid-phase epitaxy of p⁺ Si for elevated junctions. Advanced Gate Stack, Source/Drain, and Channel Engineering for Si-Based CMOS 2: New Materials, Processes, and Equipment. editor / F. Roozeboom ; D.-L. Kwong ; H. Iwai ; M.C. Öztürk ; P.J. Timans ; E. Gusev. Pennington, N.J. : The Electrochemical Society Inc., 2006. pp. 97-103 (ECS transactions; 2).

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abstract = "A solid-phase epitaxy (SPE) process that forms ultra-shallow abrupt aluminum p+-doped Si islands has been studied for deposition temperatures from 400 to 500 °C. The growth process gives a very uniform composition of the p+ layer and an abrupt doping transition to the Si substrate. Low ohmic contacting and near-ideal diode characteristics are reliably obtained. copyright The Electrochemical Society.",

author = "Y. Civale and L.K. Nanver and H. Schellevis",

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Civale, Y, Nanver, LK & Schellevis, H 2006, Material-inversion solid-phase epitaxy of p⁺ Si for elevated junctions. in F Roozeboom, D-L Kwong, H Iwai, MC Öztürk, PJ Timans & E Gusev (eds), Advanced Gate Stack, Source/Drain, and Channel Engineering for Si-Based CMOS 2: New Materials, Processes, and Equipment. ECS transactions, no. 2, vol. 3, The Electrochemical Society Inc., Pennington, N.J., pp. 97-103, 210th Electrochemical Society Meeting, ECS 2006, Cancún, Mexico, 29/10/06. https://doi.org/10.1149/1.2356268

Material-inversion solid-phase epitaxy of p⁺ Si for elevated junctions. / Civale, Y.; Nanver, L.K.; Schellevis, H.

Advanced Gate Stack, Source/Drain, and Channel Engineering for Si-Based CMOS 2: New Materials, Processes, and Equipment. ed. / F. Roozeboom; D.-L. Kwong; H. Iwai; M.C. Öztürk; P.J. Timans; E. Gusev. Pennington, N.J. : The Electrochemical Society Inc., 2006. p. 97-103 (ECS transactions; Vol. 3, No. 2).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Academic › peer-review

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N2 - A solid-phase epitaxy (SPE) process that forms ultra-shallow abrupt aluminum p+-doped Si islands has been studied for deposition temperatures from 400 to 500 °C. The growth process gives a very uniform composition of the p+ layer and an abrupt doping transition to the Si substrate. Low ohmic contacting and near-ideal diode characteristics are reliably obtained. copyright The Electrochemical Society.

AB - A solid-phase epitaxy (SPE) process that forms ultra-shallow abrupt aluminum p+-doped Si islands has been studied for deposition temperatures from 400 to 500 °C. The growth process gives a very uniform composition of the p+ layer and an abrupt doping transition to the Si substrate. Low ohmic contacting and near-ideal diode characteristics are reliably obtained. copyright The Electrochemical Society.

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Civale Y, Nanver LK, Schellevis H. Material-inversion solid-phase epitaxy of p⁺ Si for elevated junctions. In Roozeboom F, Kwong D-L, Iwai H, Öztürk MC, Timans PJ, Gusev E, editors, Advanced Gate Stack, Source/Drain, and Channel Engineering for Si-Based CMOS 2: New Materials, Processes, and Equipment. Pennington, N.J.: The Electrochemical Society Inc. 2006. p. 97-103. (ECS transactions; 2). https://doi.org/10.1149/1.2356268