TY - JOUR
T1 - Medipix2: a 64-k Pixel readout Chip with 55-um Square Elements Working in Single Photon Counting Mode
AU - San Segundo Bello, D.
AU - Campbell, R.
AU - Dinapoli, R.
AU - Llopart, X.
AU - Pernigotti, E.
PY - 2002
Y1 - 2002
N2 - The Medipix2 chip is a pixel-detector readout chip consisting of 256 /spl times/ 256 identical elements, each working in single photon counting mode for positive or negative input charge signals. Each pixel cell contains around 500 transistors and occupies a total surface area of 55 /spl mu/m /spl times/ 55 /spl mu/m. A 20-/spl mu/m wide octagonal opening connects the detector and the preamplifier input via bump bonding. The preamplifier feedback provides compensation for detector leakage current on a pixel by pixel basis. Two identical pulse height discriminators are used to create a pulse if the preamplifier output falls within a defined energy window. These digital pulses are then counted with a 13-b pseudorandom counter. The counter logic, based in a shift register, also behaves as the input-output register for the pixel. Each cell also has an 8-b configuration register which allows masking, test-enabling and 3-b individual threshold adjust for each discriminator. The chip can be configured in serial mode and readout either serially or in parallel. The chip is designed and manufactured in a 6-metal 0.25-/spl mu/m CMOS technology. First measurements show an electronic pixel noise of 140 e~ root mean square (rms) and an unadjusted threshold variation around 360 e~ rms.
AB - The Medipix2 chip is a pixel-detector readout chip consisting of 256 /spl times/ 256 identical elements, each working in single photon counting mode for positive or negative input charge signals. Each pixel cell contains around 500 transistors and occupies a total surface area of 55 /spl mu/m /spl times/ 55 /spl mu/m. A 20-/spl mu/m wide octagonal opening connects the detector and the preamplifier input via bump bonding. The preamplifier feedback provides compensation for detector leakage current on a pixel by pixel basis. Two identical pulse height discriminators are used to create a pulse if the preamplifier output falls within a defined energy window. These digital pulses are then counted with a 13-b pseudorandom counter. The counter logic, based in a shift register, also behaves as the input-output register for the pixel. Each cell also has an 8-b configuration register which allows masking, test-enabling and 3-b individual threshold adjust for each discriminator. The chip can be configured in serial mode and readout either serially or in parallel. The chip is designed and manufactured in a 6-metal 0.25-/spl mu/m CMOS technology. First measurements show an electronic pixel noise of 140 e~ root mean square (rms) and an unadjusted threshold variation around 360 e~ rms.
KW - METIS-208325
U2 - 10.1109/TNS.2002.803788
DO - 10.1109/TNS.2002.803788
M3 - Article
SN - 0018-9499
VL - 49
SP - 2279
EP - 2283
JO - IEEE transactions on nuclear science
JF - IEEE transactions on nuclear science
IS - 5
ER -